| Commit message (Expand) | Author | Age | Files | Lines | ||
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| | * | | | Map to and from this box if -abc9 | Eddie Hung | 2019-07-12 | 1 | -2/+3 | |
| | * | | | ice40_opt to handle this box and opt back to SB_LUT4 | Eddie Hung | 2019-07-12 | 1 | -0/+48 | |
| | * | | | Add new box to cells_sim.v | Eddie Hung | 2019-07-12 | 1 | -2/+25 | |
| | * | | | _ABC macro will map and unmap to this new box | Eddie Hung | 2019-07-12 | 2 | -0/+34 | |
| | * | | | Combine SB_CARRY+SB_LUT into one $__ICE40_CARRY_LUT4 box | Eddie Hung | 2019-07-12 | 3 | -25/+13 | |
| * | | | | Merge pull request #1200 from mmicko/fix_typo_liberty_cc | Clifford Wolf | 2019-07-16 | 1 | -1/+1 | |
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| | * | | | | Fix typo, double "of" | Miodrag Milanovic | 2019-07-16 | 1 | -1/+1 | |
| * | | | | | Merge pull request #1199 from mmicko/extract_fa_fix | Clifford Wolf | 2019-07-16 | 1 | -2/+2 | |
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| | * | | | | Fix check logic in extract_fa | Miodrag Milanovic | 2019-07-16 | 1 | -2/+2 | |
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| * | | | | Merge pull request #1196 from YosysHQ/eddie/fix1178 | Eddie Hung | 2019-07-15 | 1 | -5/+12 | |
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| | * | | | | Revert "Add log_checkpoint function and use it in opt_muxtree" | Eddie Hung | 2019-07-15 | 3 | -9/+0 | |
| | * | | | | Revert "Fix first divergence in #1178" | Eddie Hung | 2019-07-15 | 1 | -5/+1 | |
| | * | | | | Merge branch 'master' into eddie/fix1178 | Eddie Hung | 2019-07-15 | 26 | -93/+1204 | |
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| | * | | | | | Redesign log_id_cache so that it doesn't keep IdString instances referenced, ... | Clifford Wolf | 2019-07-15 | 1 | -6/+13 | |
| | * | | | | | Add log_checkpoint function and use it in opt_muxtree | Clifford Wolf | 2019-07-15 | 3 | -0/+9 | |
| | * | | | | | Fix first divergence in #1178 | Eddie Hung | 2019-07-09 | 1 | -1/+5 | |
| * | | | | | | Merge pull request #1189 from YosysHQ/eddie/fix1151 | Clifford Wolf | 2019-07-15 | 1 | -0/+4 | |
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| | * | | | | | | Error out if enable > dbits | Eddie Hung | 2019-07-13 | 1 | -0/+4 | |
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| * | | | | | | Merge pull request #1190 from YosysHQ/eddie/fix_1099 | Clifford Wolf | 2019-07-15 | 1 | -4/+8 | |
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| | * | | | | | | If ConstEval fails do not log_abort() but return gracefully | Eddie Hung | 2019-07-13 | 1 | -4/+8 | |
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| * | | | | | | Merge pull request #1191 from whitequark/opt_lut-log_debug | Clifford Wolf | 2019-07-15 | 1 | -56/+38 | |
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| | * | | | | | | opt_lut: make less chatty. | whitequark | 2019-07-13 | 1 | -56/+38 | |
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| * | | | | | | Merge pull request #1195 from Roman-Parise/master | Clifford Wolf | 2019-07-15 | 1 | -1/+1 | |
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| | * | | | | | | Updated FreeBSD dependencies in README.md | Roman-Parise | 2019-07-14 | 1 | -1/+1 | |
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| * | | | | | | Merge pull request #1197 from nakengelhardt/handle-setrlimit-fail | Clifford Wolf | 2019-07-15 | 1 | -1/+5 | |
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| | * | | | | | smt: handle failure of setrlimit syscall | N. Engelhardt | 2019-07-15 | 1 | -1/+5 | |
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| * | | | | | Merge pull request #1194 from cr1901/miss-semi | Eddie Hung | 2019-07-14 | 1 | -2/+2 | |
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| | * | | | | Fix missing semicolon in Windows-specific code in aigerparse.cc. | William D. Jones | 2019-07-14 | 1 | -2/+2 | |
| * | | | | | Merge pull request #1183 from whitequark/ice40-always-relut | Clifford Wolf | 2019-07-12 | 1 | -11/+5 | |
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| | * | | | | synth_ice40: switch -relut to be always on. | whitequark | 2019-07-11 | 1 | -10/+4 | |
| | * | | | | synth_ice40: fix help text typo. NFC. | whitequark | 2019-07-11 | 1 | -1/+1 | |
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| * | | | | Merge pull request #1182 from koriakin/xc6s-bram | Eddie Hung | 2019-07-11 | 9 | -8/+598 | |
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| | * | | | | synth_xilinx: Initial Spartan 6 block RAM inference support. | Marcin Kościelnicki | 2019-07-11 | 9 | -8/+598 | |
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| * | | | | Merge pull request #1185 from koriakin/xc-ff-init-vals | Eddie Hung | 2019-07-11 | 2 | -6/+6 | |
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| | * | | | | xilinx: Fix the default values for FDPE/FDSE INIT attributes to match ISE/Viv... | Marcin Kościelnicki | 2019-07-11 | 2 | -6/+6 | |
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| * / / / | Enable &mfs for abc9, even if it only currently works for ice40 | Eddie Hung | 2019-07-11 | 1 | -1/+1 | |
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| * | | | Merge pull request #1172 from whitequark/write_verilog-Sa-as-qmark | Clifford Wolf | 2019-07-11 | 1 | -2/+8 | |
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| | * | | | write_verilog: write RTLIL::Sa aka - as Verilog ?. | whitequark | 2019-07-09 | 1 | -2/+8 | |
| * | | | | Merge pull request #1179 from whitequark/attrmap-proc | Clifford Wolf | 2019-07-11 | 1 | -0/+19 | |
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| | * | | | | attrmap: also consider process, switch and case attributes. | whitequark | 2019-07-10 | 1 | -0/+19 | |
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| * | | | | Merge pull request #1180 from YosysHQ/eddie/no_abc9_retime | Eddie Hung | 2019-07-10 | 3 | -6/+15 | |
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| | * | | | | Error out if -abc9 and -retime specified | Eddie Hung | 2019-07-10 | 3 | -6/+15 | |
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| * | | | | Merge pull request #1148 from YosysHQ/xc7mux | Eddie Hung | 2019-07-10 | 7 | -49/+415 | |
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| | * | | | | Add some spacing | Eddie Hung | 2019-07-10 | 1 | -9/+9 | |
| | * | | | | Add some ASCII art explaining mux decomposition | Eddie Hung | 2019-07-10 | 1 | -0/+21 | |
| | * | | | | Call muxpack and pmux2shiftx before cmp2lut | Eddie Hung | 2019-07-09 | 1 | -9/+12 | |
| | * | | | | Restore opt_clean back to original place | Eddie Hung | 2019-07-09 | 1 | -2/+1 | |
| | * | | | | Restore missing techmap -map +/cmp2lut.v with LUT_WIDTH=6 | Eddie Hung | 2019-07-09 | 1 | -0/+2 | |
| | * | | | | Extend using A[1] to preserve don't care | Eddie Hung | 2019-07-09 | 1 | -1/+9 | |
| | * | | | | Merge remote-tracking branch 'origin/eddie/fix1173' into xc7mux | Eddie Hung | 2019-07-09 | 2 | -4/+9 | |
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index : iCE40/yosys | |
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