| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
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| | * | | | | | | | | Add comment | Eddie Hung | 2019-08-21 | 1 | -0/+4 | |
| | * | | | | | | | | Add variable length support to xilinx_srl | Eddie Hung | 2019-08-21 | 3 | -18/+167 | |
| | * | | | | | | | | Rename pattern to fixed | Eddie Hung | 2019-08-21 | 2 | -10/+10 | |
| | * | | | | | | | | attribute -> attr | Eddie Hung | 2019-08-21 | 1 | -4/+4 | |
| | * | | | | | | | | Use Cell::has_keep_attribute() | Eddie Hung | 2019-08-21 | 1 | -4/+4 | |
| | * | | | | | | | | abc9 to perform new 'map_ffs' before 'map_luts' | Eddie Hung | 2019-08-21 | 1 | -3/+18 | |
| | * | | | | | | | | xilinx_srl to support FDRE and FDRE_1 | Eddie Hung | 2019-08-21 | 2 | -10/+73 | |
| | * | | | | | | | | Fix polarity of EN_POL | Eddie Hung | 2019-08-21 | 1 | -2/+2 | |
| | * | | | | | | | | Add CLKPOL == 0 | Eddie Hung | 2019-08-21 | 1 | -0/+2 | |
| | * | | | | | | | | Reject if not minlen from inside pattern matcher | Eddie Hung | 2019-08-21 | 2 | -8/+11 | |
| | * | | | | | | | | Get wire via SigBit | Eddie Hung | 2019-08-21 | 1 | -4/+4 | |
| | * | | | | | | | | Respect \keep on cells or wires | Eddie Hung | 2019-08-21 | 1 | -2/+10 | |
| | * | | | | | | | | Merge branch 'eddie/fix_mem2reg' into eddie/xilinx_srl | Eddie Hung | 2019-08-21 | 2 | -0/+17 | |
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| | * | | | | | | | | | Add init support | Eddie Hung | 2019-08-21 | 2 | -3/+12 | |
| | * | | | | | | | | | Fix spacing | Eddie Hung | 2019-08-21 | 1 | -2/+2 | |
| | * | | | | | | | | | Initial progress on xilinx_srl | Eddie Hung | 2019-08-21 | 3 | -0/+213 | |
| * | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-28 | 33 | -409/+1901 | |
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| | * | | | | | | | | | Merge pull request #1334 from YosysHQ/clifford/async2synclatch | Eddie Hung | 2019-08-28 | 1 | -1/+36 | |
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| | | * | | | | | | | | | Add $dlatch support to async2sync | Clifford Wolf | 2019-08-28 | 1 | -1/+36 | |
| | * | | | | | | | | | | Add (* clkbuf_sink *) to SRLC16E, reorder ports to match vendor | Eddie Hung | 2019-08-28 | 1 | -3/+8 | |
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| | * | | | | | | | | | Merge pull request #1332 from YosysHQ/dave/ecp5gsr | David Shah | 2019-08-28 | 6 | -54/+212 | |
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| | | * | | | | | | | | | ecp5: Add GSR support | David Shah | 2019-08-27 | 6 | -54/+212 | |
| | * | | | | | | | | | | Merge pull request #1335 from YosysHQ/clifford/paramap | Clifford Wolf | 2019-08-28 | 1 | -68/+119 | |
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| | | * | | | | | | | | | Fix typo | Clifford Wolf | 2019-08-28 | 1 | -2/+2 | |
| | | * | | | | | | | | | Add "paramap" pass | Clifford Wolf | 2019-08-28 | 1 | -67/+118 | |
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| | * | | | | | | | | | Merge pull request #1325 from YosysHQ/eddie/sat_init | Clifford Wolf | 2019-08-28 | 2 | -2/+8 | |
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| | | * | | | | | | | | | Ignore all 1'bx in (* init *) | Eddie Hung | 2019-08-27 | 1 | -3/+1 | |
| | | * | | | | | | | | | Revert to using clean | Eddie Hung | 2019-08-27 | 1 | -1/+1 | |
| | | * | | | | | | | | | Wire with init on FF part, 1'bx on non-FF part | Eddie Hung | 2019-08-24 | 1 | -1/+3 | |
| | | * | | | | | | | | | Blocking assignment | Eddie Hung | 2019-08-23 | 1 | -1/+1 | |
| | | * | | | | | | | | | In sat: 'x' in init attr should not override constant | Eddie Hung | 2019-08-22 | 3 | -1/+7 | |
| | * | | | | | | | | | | xilinx: Add SRLC16E primitive. | Marcin Kościelnicki | 2019-08-27 | 1 | -1/+21 | |
| | * | | | | | | | | | | Merge pull request #1292 from YosysHQ/mwk/xilinx_bufgmap | Eddie Hung | 2019-08-27 | 16 | -223/+1075 | |
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| | | * | | | | | | | | | improve clkbuf_inhibit propagation upwards through hierarchy | Marcin Kościelnicki | 2019-08-27 | 2 | -6/+45 | |
| | | * | | | | | | | | | Improve tests to check that clkbuf is connected to expected | Eddie Hung | 2019-08-26 | 1 | -6/+21 | |
| | | * | | | | | | | | | Merge branch 'master' into mwk/xilinx_bufgmap | Eddie Hung | 2019-08-26 | 8 | -60/+405 | |
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| | | * | | | | | | | | | Merge branch 'master' into mwk/xilinx_bufgmap | Eddie Hung | 2019-08-23 | 1 | -1/+1 | |
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| | | * | | | | | | | | | Merge branch 'master' into mwk/xilinx_bufgmap | Eddie Hung | 2019-08-23 | 3 | -18/+36 | |
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| | | * | | | | | | | | | | Check clkbuf_inhibit=1 is ignored for custom selection | Eddie Hung | 2019-08-23 | 1 | -0/+1 | |
| | | * | | | | | | | | | | clkbufmap to only check clkbuf_inhibit if no selection given | Eddie Hung | 2019-08-23 | 1 | -5/+18 | |
| | | * | | | | | | | | | | Add simple clkbufmap tests | Eddie Hung | 2019-08-23 | 1 | -0/+52 | |
| | | * | | | | | | | | | | tests/techmap/run-test.sh to cope with *.ys | Eddie Hung | 2019-08-23 | 2 | -7/+18 | |
| | | * | | | | | | | | | | Mention clkbuf_inhibit can be overridden | Eddie Hung | 2019-08-23 | 1 | -7/+8 | |
| | | * | | | | | | | | | | Review comment from @cliffordwolf | Eddie Hung | 2019-08-23 | 1 | -1/+2 | |
| | | * | | | | | | | | | | Merge remote-tracking branch 'origin/master' into mwk/xilinx_bufgmap | Eddie Hung | 2019-08-23 | 146 | -1486/+4373 | |
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| | | * \ \ \ \ \ \ \ \ \ \ | Merge remote-tracking branch 'origin/master' into mwk/xilinx_bufgmap | Eddie Hung | 2019-08-16 | 57 | -3403/+3432 | |
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| | | * | | | | | | | | | | | | README updates | Marcin Kościelnicki | 2019-08-13 | 1 | -0/+14 | |
| | | * | | | | | | | | | | | | move attributes to wires | Marcin Kościelnicki | 2019-08-13 | 8 | -311/+546 | |
| | | * | | | | | | | | | | | | minor review fixes | Marcin Kościelnicki | 2019-08-13 | 2 | -3/+5 | |
| | | * | | | | | | | | | | | | review fixes | Marcin Kościelnicki | 2019-08-13 | 4 | -47/+34 | |
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index : iCE40/yosys | |
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