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Merge pull request #1656 from YosysHQ/eddie/ice40_abc9_warnings
Eddie Hung
2020-01-27
6
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ice40: reduce ABC9 internal fanout warnings with a param for CI->I3
Eddie Hung
2020-01-24
6
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+26
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Merge pull request #1658 from YosysHQ/clifford/smtbmcsolvernotfound
Claire Wolf
2020-01-27
1
-1
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+5
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Improve yosys-smtbmc "solver not found" handling
Claire Wolf
2020-01-27
1
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+5
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Merge pull request #1613 from porglezomp-misc/version-flag-alias
Claire Wolf
2020-01-27
1
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+6
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Add --version and -version as aliases for -V
Cassie Jones
2020-01-05
1
-0
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+6
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ice40: add SB_SPRAM256KA arrival time
Eddie Hung
2020-01-24
1
-0
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+1
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simple_abc9 tests to discard whitebox before write for sim
Eddie Hung
2020-01-23
2
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+3
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abc_box_id -> abc9_box_id in test
Eddie Hung
2020-01-23
1
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+1
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Fix $__ABC9_ASYNC1 to output 1'b1 not 1'b0
Eddie Hung
2020-01-23
1
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Merge pull request #1652 from YosysHQ/eddie/abc9_fixes
Eddie Hung
2020-01-22
1
-4
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+6
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abc9: error out if flip-flop init is 1'b1 for '-dff'
Eddie Hung
2020-01-22
1
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+2
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abc9: fix scratchpad entry abc9.verify
Eddie Hung
2020-01-22
1
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+4
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Merge pull request #1637 from YosysHQ/mwk/fix-1634
Claire Wolf
2020-01-21
1
-9
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+17
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fsm_detect: Add a cache to avoid excessive CPU usage for big mux networks.
Marcin Kościelnicki
2020-01-14
1
-9
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+17
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Merge pull request #1629 from YosysHQ/mwk/edif-z
Claire Wolf
2020-01-21
1
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+2
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edif: Just ignore connections to 'z
Marcin Kościelnicki
2020-01-13
1
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+2
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Merge pull request #1621 from YosysHQ/clifford/fminit
Claire Wolf
2020-01-20
2
-0
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+198
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Add fminit pass
Clifford Wolf
2020-01-09
2
-0
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+198
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Merge pull request #1643 from YosysHQ/eddie/cleanup_arith_map
Eddie Hung
2020-01-18
2
-125
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+88
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Deprecate `_CLB_CARRY from +/xilinx/arith_map.v since #1623
Eddie Hung
2020-01-17
2
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+82
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+/xilinx/arith_map.v fix $lcu rule
Eddie Hung
2020-01-17
1
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+6
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Merge pull request #1602 from niklasnisbeth/ice40-init-vals-warning
David Shah
2020-01-18
1
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+8
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ice40: Demote conflicting FF init values to a warning
Niklas Nisbeth
2019-12-31
1
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+8
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Merge pull request #1645 from YosysHQ/eddie/fix1644
Eddie Hung
2020-01-17
9
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+52
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xilinx_dsp: another typo; move xilinx specific test
Eddie Hung
2020-01-17
2
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+1
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ice40_dsp: fix typo
Eddie Hung
2020-01-17
2
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+13
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Consistency
Eddie Hung
2020-01-17
2
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+6
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xilinx_dsp: add parameter defaults
Eddie Hung
2020-01-17
1
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+7
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Add #1644 testcase
Eddie Hung
2020-01-17
2
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+2
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synth_ice40: call wreduce before mul2dsp
Eddie Hung
2020-01-17
1
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+2
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ice40_dsp: add test
Eddie Hung
2020-01-17
1
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+11
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ice40_dsp: add default values for parameters
Eddie Hung
2020-01-17
2
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+11
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ice40_dsp: tolerant of fanout-less outputs, as well as all-zero inputs
Eddie Hung
2020-01-17
1
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+5
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Merge pull request #1639 from YosysHQ/eddie/fix_read_xaiger
Eddie Hung
2020-01-15
2
-2
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+14
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abc9: aAdd test to check $_NOT_s are absorbed
Eddie Hung
2020-01-15
1
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+12
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read_aiger: $lut prefix in front
Eddie Hung
2020-01-15
1
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+2
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Merge pull request #1636 from YosysHQ/eddie/fix_synth_xilinx_W
Miodrag Milanović
2020-01-15
1
-1
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+1
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synth_xilinx: fix default W value for non-xc7
Eddie Hung
2020-01-14
1
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Merge pull request #1635 from YosysHQ/eddie/print_stats
Eddie Hung
2020-01-14
1
-25
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+13
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As before, only display MEM if Linux or FreeBSD
Eddie Hung
2020-01-14
1
-3
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+7
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print_stats footer to return peak memory, option for including children
Eddie Hung
2020-01-14
1
-28
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+12
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Merge pull request #1633 from YosysHQ/eddie/fix_autoname
Eddie Hung
2020-01-14
2
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+20
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autoname: do not autoname ports
Eddie Hung
2020-01-14
1
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+1
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autoname: add testcase with $-prefix-ed port
Eddie Hung
2020-01-14
1
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+19
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Merge pull request #1632 from YosysHQ/eddie/fix1630
Eddie Hung
2020-01-14
5
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+23
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read_aiger: also rename "$0"
Eddie Hung
2020-01-14
1
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+2
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read_aiger: uniquify wires with $aiger<autoidx> prefix
Eddie Hung
2020-01-13
2
-9
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+13
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Add #1630 testcase
Eddie Hung
2020-01-13
2
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+2
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read_aiger: make $and/$not/$lut the prefix not suffix
Eddie Hung
2020-01-13
2
-9
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+9
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