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* - .gitignore: ignore qmake/OSX package libs/svgviewer/svgviewer.appSiesh1oo2014-03-121-0/+1
* - Makefile: follow changes in https://github.com/cliffordwolf/yosysSiesh1oo2014-03-121-16/+3
* - libs/minisat/Solver.cc: insert spaces between string and PRIu64 literal, o...Siesh1oo2014-03-121-5/+5
* - libs/minisat/System.cc: fix definition/declaration mismatch for Minisat::m...Siesh1oo2014-03-121-3/+3
* Merge branch 'master' of https://github.com/Siesh1oo/yosysSiesh1oo2014-03-124-6/+190
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| * - Makefile: don't add '-g' after '-ggdb' to CXXFLAGSSiesh1oo2014-03-111-2/+2
| * Rebase to cliffordwolf repo HEAD finished.Siesh1oo2014-03-114-6/+190
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| | * - passes/techmap/Makefile.inc: POSIX 'od' has no '-w' option. Use '-An' inst...Siesh1oo2014-03-111-4/+6
| | * - Makefile: include $(PWD) in PATH, since 'make test' can happen before 'mak...Siesh1oo2014-03-101-1/+1
| | * - libs/ezsat/ezminisat.cc: use sigemptyset() to clear sig_action.sa_mask; us...Siesh1oo2014-03-101-2/+2
| | * - Makefile: fix typo in LDFLAGS: obviously -L, not -I is required hereSiesh1oo2014-03-101-1/+1
| | * - Makefile: export PATH=${DESTDIR}/bin:$(PATH) and (DY)LD_LIBRARY_PATH, to m...Siesh1oo2014-03-101-2/+6
| | * - frontends/vhdl2verilog/vhdl2verilog.cc, passes/abc/abc.cc: #include <climi...Siesh1oo2014-03-102-0/+2
| | * - Makefile, techlibs/common/Makefile.inc: call GNU sed instead of BSD sed on...Siesh1oo2014-03-102-3/+5
| | * - libs/ezsat/ezminisat.cc: use POSIX.2001 sigaction() instead on non-portabl...Siesh1oo2014-03-101-4/+8
| | * - Makefile, kernel/posix_compatibility.h/.cc: provide POSIX.2008 fake implem...Siesh1oo2014-03-104-10/+211
| | * - README: fix typo in sed-command for minisat-include fix.Siesh1oo2014-03-101-1/+1
| | * - frontends/vhdl2verilog/vhdl2verilog.cc: #include <cerrno> for errno; use P...Siesh1oo2014-03-101-4/+11
| | * - kernel/register.cc: need to #include <cerrno> or errno.h for errno.Siesh1oo2014-03-101-0/+1
| | * - kernel/driver.cc: need to #include <cerrno> or errno.h for errno.Siesh1oo2014-03-101-0/+1
| | * - kernel/log.h: add rusage()-based fallback for systems without clock_gettim...Siesh1oo2014-03-101-0/+16
| | * - libs/ezsat/ezsat.cc: need to #include <cmath> or math.h for math functions.Siesh1oo2014-03-101-1/+2
| | * - passes/abc/abc.cc: #include <cerrno> for errno; use POSIX getcwd() for por...Siesh1oo2014-03-101-2/+6
| | * - passes/techmap/dfflibmap.cc, passes/fsm/fsm_recode.cc, passes/cmds/select....Siesh1oo2014-03-103-1/+4
| * | - Makefile: include $(PWD) in PATH, since 'make test' can happen before 'mak...Siesh1oo2014-03-111-1/+1
| * | - Makefile: fix typo in LDFLAGS: obviously -L, not -I is required hereSiesh1oo2014-03-111-1/+1
| * | - Makefile: export PATH=${DESTDIR}/bin:$(PATH) and (DY)LD_LIBRARY_PATH, to m...Siesh1oo2014-03-111-2/+6
| * | - Makefile: resolve merge conflict.Siesh1oo2014-03-111-5/+23
* | | - Makefile: include $(PWD) in PATH, since 'make test' can happen before 'mak...Siesh1oo2014-03-121-1/+1
* | | - Makefile: fix typo in LDFLAGS: obviously -L, not -I is required hereSiesh1oo2014-03-121-1/+1
* | | - Makefile: export PATH=${DESTDIR}/bin:$(PATH) and (DY)LD_LIBRARY_PATH, to m...Siesh1oo2014-03-121-1/+5
* | | - Makefile: resolve merge conflict.Siesh1oo2014-03-121-5/+23
* | | Fixed dependencies of "make test"Clifford Wolf2014-03-121-1/+1
* | | Added libs/minisat (copy of minisat git master)Clifford Wolf2014-03-1228-28/+5025
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* | OSX compatible creation of stdcells.inc, using code from github.com/Siesh1oo/...Clifford Wolf2014-03-111-2/+3
* | Merged addition of SED makefile variable from github.com/Siesh1oo/yosysClifford Wolf2014-03-112-2/+3
* | Merged a few fixes for non-posix systems from github.com/Siesh1oo/yosysClifford Wolf2014-03-1111-13/+52
* | Added support for `line compiler directiveClifford Wolf2014-03-111-0/+11
* | Fixed memory corruption in passes/abc/blifparse.ccClifford Wolf2014-03-111-1/+1
* | Fixed yosys path in tests/techmap/mem_simple_4x1_runtest.shClifford Wolf2014-03-111-1/+1
* | Use "verilog -noattr" in tests/techmap/mem_simple_4x1 test (for old iverilog)Clifford Wolf2014-03-111-1/+1
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* Fixed a typo in RTLIL::Module::addReduce...Clifford Wolf2014-03-101-5/+5
* Improved verific command (added support for some operators)Clifford Wolf2014-03-101-2/+160
* Improvements in verific commandClifford Wolf2014-03-101-59/+39
* Added RTLIL::Module::add... helper methodsClifford Wolf2014-03-102-0/+293
* Added "verific" commandClifford Wolf2014-03-093-2/+501
* Fixed dumping of timing() { .. } block in libparseClifford Wolf2014-03-091-2/+3
* Verbose reading of liberty and constr files in ABC passClifford Wolf2014-03-091-2/+2
* Fixed bug in freduce commandClifford Wolf2014-03-071-0/+30
* Some minor code cleanups in freduce commandClifford Wolf2014-03-071-5/+5