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* abc9_ops: use TimingInfo for -prep_{lut,box} tooEddie Hung2020-02-272-25/+22
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* abc9_ops: use TimingInfo for -prep_{lut,box} tooEddie Hung2020-02-273-97/+65
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* abc9_ops: add and use new TimingInfo structEddie Hung2020-02-272-70/+214
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* Fix tests/arch/xilinx/fsm.ys to count flops onlyEddie Hung2020-02-271-9/+3
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* Expand +/xilinx/cells_sim.v to keep ICARUS and non -specify paresr happyEddie Hung2020-02-271-14/+12
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* ice40: fix specify for inverted clocksEddie Hung2020-02-271-27/+27
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* Fix tests by gating some specify constructs from iverilogEddie Hung2020-02-271-0/+16
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* Update simple_abc9 testsEddie Hung2020-02-273-5/+8
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* abc9_ops: ignore (* abc9_flop *) if not '-dff'Eddie Hung2020-02-274-104/+114
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* ice40: specify fixesEddie Hung2020-02-273-66/+66
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* abc9_ops: sort LUT delays to be ascendingEddie Hung2020-02-271-1/+4
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* ice40: move over to specify blocks for -abc9Eddie Hung2020-02-2710-164/+1344
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* synth_ecp5: use +/abc9_model.vEddie Hung2020-02-271-1/+1
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* Update xilinx for ABC9Eddie Hung2020-02-273-20/+16
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* Create +/abc9_model.v for $__ABC9_{DELAY,FF_}Eddie Hung2020-02-272-0/+11
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* abc9_ops: output LUT areaEddie Hung2020-02-271-6/+6
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* ecp5: remove small LUT entriesEddie Hung2020-02-271-24/+6
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* abc9_ops: cope with T_LIMIT{,2}_{MIN,TYP,MAX} and auto-gen small LUTsEddie Hung2020-02-271-18/+33
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* Fix commented out specify statementEddie Hung2020-02-271-6/+6
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* xilinx: improve specify functionalityEddie Hung2020-02-278-466/+547
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* ecp5: deprecate abc9_{arrival,required} and *.{lut,box}Eddie Hung2020-02-277-86/+120
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* xilinx: use specify blocks in place of abc9_{arrival,required}Eddie Hung2020-02-273-347/+670
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* Auto-generate .box/.lut files from specify blocksEddie Hung2020-02-278-466/+268
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* abc9_ops: assert on $specify2 propertiesEddie Hung2020-02-271-0/+3
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* abc9_ops: -prep_box, to be called onceEddie Hung2020-02-273-51/+50
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* abc9_ops: -prep_lut and -write_lut to auto-generate LUT libraryEddie Hung2020-02-274-10/+200
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* Merge pull request #1709 from rqou/coolrunner2_counterClaire Wolf2020-02-274-97/+519
|\ | | | | Improve CoolRunner-II optimization by using extract_counter pass
| * coolrunner2: Use extract_counter to optimize countersR. Ou2020-02-173-0/+165
| | | | | | | | | | This tends to make much more efficient pterm usage compared to just throwing the problem at ABC
| * extract_counter: Implement extracting up countersR. Ou2020-02-171-65/+247
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| * extract_counter: Add support for inverted clock enableR. Ou2020-02-171-8/+28
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| * extract_counter: Fix clock enableR. Ou2020-02-171-1/+3
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| * extract_counter: Fix outputting count to module portR. Ou2020-02-171-8/+20
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| * extract_counter: Allow forbidding async resetR. Ou2020-02-171-2/+17
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| * extract_counter: Refactor out extraction settings into structR. Ou2020-02-171-17/+43
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* | Merge pull request #1708 from rqou/coolrunner2-buf-fixClaire Wolf2020-02-274-54/+163
|\ \ | | | | | | coolrunner2: Separate and improve buffer cell insertion pass
| * | coolrunner2: Separate and improve buffer cell insertion passR. Ou2020-02-164-54/+163
| |/ | | | | | | | | | | | | The new pass will contain all of the logic for inserting "passthrough" product term and XOR cells as appropriate for the architecture. For example, this commit fixes connecting an input pin directly to another output pin with no logic in between.
* | xilinx: mark IOBUFDSE3 IOB pin as externalPiotr Binkowski2020-02-272-1/+2
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* | Merge pull request #1705 from YosysHQ/logger_passMiodrag Milanović2020-02-266-2/+303
|\ \ | | | | | | Logger pass
| * | Remove tests for nowMiodrag Milanovic2020-02-264-24/+0
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| * | Add tests for logger passMiodrag Milanovic2020-02-234-0/+24
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| * | Remove duplicate warning detectionMiodrag Milanovic2020-02-231-0/+6
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| * | Fix line endingsMiodrag Milanovic2020-02-231-10/+10
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| * | Update explanation for expect-no-warningsMiodrag Milanovic2020-02-221-1/+1
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| * | Handle expect no warnings together with expectedMiodrag Milanovic2020-02-223-4/+12
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| * | Check other regex parametersMiodrag Milanovic2020-02-221-15/+30
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| * | check for regex errorsMiodrag Milanovic2020-02-201-16/+20
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| * | Prevent double error messageMiodrag Milanovic2020-02-171-1/+3
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| * | Option to expect no warningsMiodrag Milanovic2020-02-174-0/+12
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| * | Add to changelogMiodrag Milanovic2020-02-171-0/+1
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| * | No new error if already failingMiodrag Milanovic2020-02-171-1/+2
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