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* | | | Update manualMiodrag Milanovic2022-12-051-6/+189
* | | | Merge pull request #3572 from jix/tcl-recoverMiodrag Milanović2022-12-056-8/+114
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| * | | | tcl: Update help message to mention 'tee -s'Jannis Harder2022-12-051-2/+2
| * | | | tcl: Unset both result.json and result.string only before calling passJannis Harder2022-12-051-2/+1
| * | | | tcl: Don't exit repl on recoverable command errorsJannis Harder2022-12-022-4/+36
| * | | | tcl: Return scratchpad result.json and result.string as tcl objectsJannis Harder2022-12-021-2/+57
| * | | | stat: Fix JSON output for empty designsJannis Harder2022-12-021-2/+2
| * | | | tee: Allow logging command output to a given scratchpad valueJannis Harder2022-12-023-0/+20
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* | | | Merge pull request #3568 from YosysHQ/verific_msgMiodrag Milanović2022-12-051-3/+16
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| * | | | set VERI-1063 explicitlyMiodrag Milanovic2022-12-021-5/+7
| * | | | Set all verific messages of certain type to otherMiodrag Milanovic2022-11-301-3/+14
* | | | | Merge pull request #3569 from YosysHQ/ver_no_rewritersMiodrag Milanović2022-12-051-0/+2
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| * | | | reset elaboration error after rewriterMiodrag Milanovic2022-11-301-0/+2
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| | | * Merge branch 'claire/eqystuff' of github.com:YosysHQ/yosys into claire/eqystuffClaire Xenia Wolf2022-12-211-14/+10
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| | | | * xprop: Improve signal splitting codeJannis Harder2022-12-121-14/+10
| | | * | Allow non-unique modules without state in sim writeback-modeClaire Xenia Wolf2022-12-211-4/+5
| | | * | Small bugfix in uniquify passClaire Xenia Wolf2022-12-211-0/+1
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| | | * Improvements in "viz" passClaire Xenia Wolf2022-12-091-24/+100
| | | * Add gold-x handing to miter cross port handlingClaire Xenia Wolf2022-12-081-1/+9
| | | * Merge branch 'claire/eqystuff' of github.com:YosysHQ/yosys into claire/eqystuffClaire Xenia Wolf2022-12-081-0/+39
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| | | | * Merge pull request #3579 from jix/split_public_untestedClaire Xen2022-12-081-0/+39
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| | | | | * xprop: Add -split-public optionJannis Harder2022-12-081-0/+39
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| | | * / Improvements in "viz" commandClaire Xenia Wolf2022-12-071-17/+51
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| | | * Improvements in "viz" passClaire Xenia Wolf2022-12-071-313/+453
| | | * Various improvements in "viz" commandClaire Xenia Wolf2022-12-061-72/+242
| | | * Bugfix in splitcells passClaire Xenia Wolf2022-12-061-5/+13
| | | * Improvements in "viz" commandClaire Xenia Wolf2022-12-041-45/+196
| | | * Add "viz" pass for visualizing big-picture data flow in larger designsClaire Xenia Wolf2022-12-042-0/+511
| | | * Add splitcells passClaire Xenia Wolf2022-12-042-0/+192
| | | * Merge branch 'master' of github.com:YosysHQ/yosys into claire/eqystuffClaire Xenia Wolf2022-12-042-1/+8
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* | | | Merge pull request #3567 from YosysHQ/tcl_fix_crashMiodrag Milanović2022-12-022-1/+8
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| * | | | Fix tcl crash in case of error executing commandMiodrag Milanovic2022-11-302-1/+8
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| | | * Merge branch 'xprop' of github.com:jix/yosys into claire/eqystuffClaire Xenia Wolf2022-12-0129-79/+2537
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| | * | miter: Add -make_cover option to cover each output pair differenceJannis Harder2022-11-301-0/+14
| | * | formalff: Fix -ff2anyinit assertion error for fine FFsJannis Harder2022-11-301-0/+2
| | * | New xprop pass to encode 3-valued x-propagation using 2-valued logicJannis Harder2022-11-307-0/+2001
| | * | sim: Improved global clock handlingJannis Harder2022-11-301-13/+14
| | * | opt_expr: Optimizations for `$bweqx` and `$bwmux`Jannis Harder2022-11-301-0/+63
| | * | Add bwmuxmap passJannis Harder2022-11-307-0/+76
| | * | Add bitwise `$bweqx` and `$bwmux` cellsJannis Harder2022-11-309-11/+179
| | * | verilog_backend: Do not run bmuxmap or demuxmap in -noexpr mode.Jannis Harder2022-11-301-2/+4
| | * | verilog_backend: Correctly sign extend output of signed `$modfloor`Jannis Harder2022-11-301-2/+2
| | * | verilog_backend: Add -noparallelcase optionJannis Harder2022-11-301-7/+31
| | * | simlib: Use optional SIMLIB_GLOBAL_CLOCK to define a global clock signalJannis Harder2022-11-301-2/+8
| | * | simlib: Silence iverilog warning for `$lut`Jannis Harder2022-11-301-1/+1
| | * | simlib: Fix wide $bmux and avoid iverilog warningsJannis Harder2022-11-301-2/+2
| | * | satgen, simlib: Consistent x-propagation for `$pmux` cellsJannis Harder2022-11-302-18/+20
| | * | opt_expr: Fix shift/shiftx optimizationsJannis Harder2022-11-301-3/+3
| | * | opt_expr: Constant fold mux, pmux, bmux, demux, eqx, nex cellsJannis Harder2022-11-291-0/+33
| | * | opt_expr: Optimize bitwise logic ops with one fully const inputJannis Harder2022-11-291-0/+81
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