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* Merge branch 'master' of github.com:YosysHQ/yosys into claire/eqystuffClaire Xenia Wolf2022-12-042-1/+8
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| * Merge pull request #3567 from YosysHQ/tcl_fix_crashMiodrag Milanović2022-12-022-1/+8
| |\ | | | | | | Fix tcl crash in case of error executing command
| | * Fix tcl crash in case of error executing commandMiodrag Milanovic2022-11-302-1/+8
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* | | Merge branch 'xprop' of github.com:jix/yosys into claire/eqystuffClaire Xenia Wolf2022-12-0129-79/+2537
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| * | | miter: Add -make_cover option to cover each output pair differenceJannis Harder2022-11-301-0/+14
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| * | | formalff: Fix -ff2anyinit assertion error for fine FFsJannis Harder2022-11-301-0/+2
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| * | | New xprop pass to encode 3-valued x-propagation using 2-valued logicJannis Harder2022-11-307-0/+2001
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| * | | sim: Improved global clock handlingJannis Harder2022-11-301-13/+14
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| * | | opt_expr: Optimizations for `$bweqx` and `$bwmux`Jannis Harder2022-11-301-0/+63
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| * | | Add bwmuxmap passJannis Harder2022-11-307-0/+76
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| * | | Add bitwise `$bweqx` and `$bwmux` cellsJannis Harder2022-11-309-11/+179
| | | | | | | | | | | | | | | | | | | | | | | | The new bitwise case equality (`$bweqx`) and bitwise mux (`$bwmux`) cells enable compact encoding and decoding of 3-valued logic signals using multiple 2-valued signals.
| * | | verilog_backend: Do not run bmuxmap or demuxmap in -noexpr mode.Jannis Harder2022-11-301-2/+4
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| * | | verilog_backend: Correctly sign extend output of signed `$modfloor`Jannis Harder2022-11-301-2/+2
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| * | | verilog_backend: Add -noparallelcase optionJannis Harder2022-11-301-7/+31
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| * | | simlib: Use optional SIMLIB_GLOBAL_CLOCK to define a global clock signalJannis Harder2022-11-301-2/+8
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| * | | simlib: Silence iverilog warning for `$lut`Jannis Harder2022-11-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | iverilog complains about implicitly truncating LUT when connecting it to the `$bmux` A input. This explicitly truncates it to avoid that warning without changing the behaviour otherwise.
| * | | simlib: Fix wide $bmux and avoid iverilog warningsJannis Harder2022-11-301-2/+2
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| * | | satgen, simlib: Consistent x-propagation for `$pmux` cellsJannis Harder2022-11-302-18/+20
| | | | | | | | | | | | | | | | | | | | This updates satgen and simlib to use a `$pmux` model where the output is fully X when the S input is not all zero or one-hot with no x bits.
| * | | opt_expr: Fix shift/shiftx optimizationsJannis Harder2022-11-301-3/+3
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| * | | opt_expr: Constant fold mux, pmux, bmux, demux, eqx, nex cellsJannis Harder2022-11-291-0/+33
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| * | | opt_expr: Optimize bitwise logic ops with one fully const inputJannis Harder2022-11-291-0/+81
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| * | | simplemap: Map `$xnor` to `$_XNOR_` cellsJannis Harder2022-11-293-20/+5
| | |/ | |/| | | | | | | | | | The previous mapping to `$_XOR_` and `$_NOT_` predates the addition of the `$_XNOR_` cell.
* | | Add insbuf -chain modeClaire Xenia Wolf2022-12-011-2/+38
| |/ |/| | | | | Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
* | Bump versiongithub-actions[bot]2022-12-011-1/+1
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* | Merge pull request #3551 from daglem/struct-array-swapped-rangeJannis Harder2022-12-013-21/+192
|\ \ | |/ |/| Support for arrays with swapped ranges within structs
| * Added asserts for current limitation of array dimensions in packed structsDag Lem2022-11-301-0/+8
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| * Check for all cases of currently unsupported array dimensions in packed structsDag Lem2022-11-301-10/+13
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| * Tests for unpacked arrays in packed structs are for the Yosys frontend onlyDag Lem2022-11-231-0/+4
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| * Support for swapped ranges in second array dimensionDag Lem2022-11-232-3/+52
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| * Support for arrays with swapped ranges within structsDag Lem2022-11-123-11/+118
| | | | | | | | | | | | This also corrects the implementation of C type arrays within structs. Fixes #3550
* | Bump versiongithub-actions[bot]2022-11-291-1/+1
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* | Merge pull request #3565 from jix/sat-def-formalJannis Harder2022-11-283-10/+46
|\ \ | | | | | | sat: Add -set-def-formal option to force defined $any* outputs
| * | sat: Add -set-def-formal option to force defined $any* outputsJannis Harder2022-11-283-10/+46
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* | Bump versiongithub-actions[bot]2022-11-261-1/+1
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* | Merge pull request #3561 from YosysHQ/tcl_shellMiodrag Milanović2022-11-252-8/+34
|\ \ | | | | | | Add TCL interactive shell mode
| * | Add TCL interactive shell modeMiodrag Milanovic2022-11-252-8/+34
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* | | Merge pull request #3560 from YosysHQ/verific_confMiodrag Milanović2022-11-253-8/+43
|\ \ \ | |/ / |/| | Support importing verilog configurations using Verific
| * | update documentationMiodrag Milanovic2022-11-251-3/+3
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| * | Support importing verilog configurations using VerificMiodrag Milanovic2022-11-253-5/+40
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* | | Bump versiongithub-actions[bot]2022-11-251-1/+1
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* | | Remove docs dependency on yosys repo (#3558)KrystalDelusion2022-11-2439-18/+905
|/ / | | | | | | | | | | | | | | | | | | | | * Copies guidelines files into docs/ for website * Copying manual/CHAPTER_Prog for new docs * Copying manual/APPNOTE_011... for new docs Also adding faketime to list of packages for website build. Co-authored-by: KrystalDelusion <krystinedawn@yosyshq.com>
* | Merge pull request #3552 from daglem/fix-sv-c-array-dimensionsJannis Harder2022-11-231-3/+3
|\ \ | | | | | | Correct interpretation of SystemVerilog C-style array dimensions
| * | Correct interpretation of SystemVerilog C-style array dimensionsDag Lem2022-11-131-3/+3
| | | | | | | | | | | | IEEE Std 1800™-2017 7.4.2 specifies that [size] is the same as [0:size-1].
* | | Bump versiongithub-actions[bot]2022-11-221-1/+1
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* | | Merge branch 'zachjs-master'Jannis Harder2022-11-213-0/+52
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| * | | verilog: Support module-scoped task/function callsZachary Snow2022-10-293-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is primarily intended to enable the standard-permitted use of module-scoped identifiers to refer to tasks and non-constant functions. As a side-effect, this also adds support for the non-standard use of module-scoped identifiers referring to constant functions, a feature that is supported in some other tools, including Iverilog.
* | | | mention prerequisites in fsm_detect and fsm helpN. Engelhardt2022-11-212-0/+18
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* | | | Bump versiongithub-actions[bot]2022-11-181-1/+1
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* | | | fabulous: Allow adding extra custom prims and map rulesgatecat2022-11-174-0/+53
| | | | | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | | | fabulous: improvements to the passgatecat2022-11-1713-139/+340
| | | | | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
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