| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge branch 'master' into btor-ng | Clifford Wolf | 2017-12-10 | 1 | -69/+122 |
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| | * | Add support for Verific PRIM_SVA_NOT properties | Clifford Wolf | 2017-12-10 | 1 | -10/+25 |
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| | * | Add Verific OPER_SVA_STABLE support | Clifford Wolf | 2017-12-10 | 1 | -2/+32 |
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| | * | Refactoring Verific SVA rewriter | Clifford Wolf | 2017-12-10 | 1 | -62/+70 |
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| * | | Fix btor concat | Clifford Wolf | 2017-12-09 | 1 | -1/+1 |
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| * | | Merge branch 'master' into btor-ng | Clifford Wolf | 2017-12-09 | 4 | -4/+9 |
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| | * | Merge pull request #467 from mithro/patch-1 | Clifford Wolf | 2017-12-09 | 1 | -1/+1 |
| | |\ | | | | | | | Fix spelling in -vpr help for synth_ice40 | ||||
| | | * | Fix spelling in -vpr help for synth_ice40 | Tim Ansell | 2017-12-08 | 1 | -1/+1 |
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| | * | Use "hg ... --insecure" for cloning/pulling ABC | Clifford Wolf | 2017-12-03 | 1 | -2/+2 |
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| | * | Update ABC to hg rev 31fc97b0aeed | Clifford Wolf | 2017-12-02 | 1 | -1/+1 |
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| | * | Fix error handling for nested always/initial | Clifford Wolf | 2017-12-02 | 2 | -0/+5 |
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| * | | Merge branch 'master' into btor-ng | Clifford Wolf | 2017-12-01 | 1 | -0/+263 |
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| | * | Merge pull request #462 from daveshah1/up5k | Clifford Wolf | 2017-11-28 | 1 | -0/+263 |
| | |\ | | | | | | | Add remaining UltraPlus cells to ice40 techlib | ||||
| | | * | Add remaining UltraPlus cells to ice40 techlib | David Shah | 2017-11-28 | 1 | -0/+263 |
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| * | | | Merge branch 'master' into btor-ng | Clifford Wolf | 2017-11-27 | 10 | -9/+54 |
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| | * | | Fixed "yosys-smtbmc -g" handling of no solution | Clifford Wolf | 2017-11-27 | 1 | -1/+1 |
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| | * | | Merge pull request #460 from mithro/g3-fixes | Clifford Wolf | 2017-11-26 | 9 | -8/+45 |
| | |\ \ | | | | | | | | | Bunch of small fixes | ||||
| | | * | | minisat: Make update script executable. | Tim 'mithro' Ansell | 2017-11-25 | 1 | -0/+0 |
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| | | * | | minisat: Only define __STDC_XXX_MACROS if not already defined. | Tim 'mithro' Ansell | 2017-11-25 | 6 | -3/+23 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace; #define __STDC_LIMIT_MACROS #define __STDC_FORMAT_MACROS With #ifndef __STDC_LIMIT_MACROS #define __STDC_LIMIT_MACROS #endif #ifndef __STDC_FORMAT_MACROS #define __STDC_FORMAT_MACROS #endif This fixes a compile warning if you are defining these macros in your CXXFLAGS (as some distros do). | ||||
| | | * | | minisat: Remove template with gzFile specialization. | Tim 'mithro' Ansell | 2017-11-25 | 2 | -4/+21 |
| | | | | | | | | | | | | | | | | | | | | | All the other gzFile functions have been removed but this template was still left around. | ||||
| | | * | | subcircuit: Class with virtual methods should have virtual destructor. | Tim 'mithro' Ansell | 2017-11-25 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | Fixes a compile warning. * https://stackoverflow.com/questions/1123044/when-should-your-destructor-be-virtual | ||||
| | * | | | Merge pull request #461 from mithro/travis-rework | Clifford Wolf | 2017-11-26 | 1 | -1/+9 |
| | |\ \ \ | | |/ / | |/| | | travis: Print branches before fetching, try both locations. | ||||
| | | * | | travis: Print branches before fetching, try both locations. | Tim 'mithro' Ansell | 2017-11-25 | 1 | -1/+9 |
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| * | | | Fixed "yosys-smtbmc -g" handling of no solution | Clifford Wolf | 2017-11-27 | 1 | -1/+1 |
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| * | | | Merge branch 'master' into btor-ng | Clifford Wolf | 2017-11-24 | 5 | -33/+309 |
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| | * | | Merge pull request #446 from mithro/travis-rework | Clifford Wolf | 2017-11-24 | 5 | -33/+309 |
| | |\ \ | | | | | | | | | Reworking the Travis CI for Yosys. | ||||
| | | * | | travis: Use the cache. | Tim 'mithro' Ansell | 2017-11-24 | 1 | -1/+1 |
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| | | * | | travis: Adding gcc-4.8 and gcc-6 on Linux. | Tim 'mithro' Ansell | 2017-11-24 | 1 | -0/+47 |
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| | | * | | travis: Reworking travis setup. | Tim 'mithro' Ansell | 2017-11-24 | 5 | -33/+262 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Move the code into scripts inside .travis directory. * Build on multiple compiler versions. Fixes #442 - Make travis build pass Fixes #441 - Fix git version information on travis build Fixes #440 - Make travis cache the iverilog build | ||||
| * | | | | Bugfixes in new BTOR back-end | Clifford Wolf | 2017-11-24 | 1 | -2/+3 |
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| * | | | | Progress in new BTOR back-end | Clifford Wolf | 2017-11-23 | 1 | -36/+97 |
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| * | | | | Progress in new BTOR back-end | Clifford Wolf | 2017-11-23 | 1 | -3/+95 |
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| * | | | | Progress in new BTOR back-end | Clifford Wolf | 2017-11-23 | 1 | -14/+72 |
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| * | | | | Merge branch 'master' into btor-ng | Clifford Wolf | 2017-11-23 | 3 | -13/+121 |
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| | * | | | Merge branch 'master' of github.com:cliffordwolf/yosys | Clifford Wolf | 2017-11-23 | 1 | -0/+103 |
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| | | * \ \ | Merge pull request #455 from daveshah1/up5k | Clifford Wolf | 2017-11-18 | 1 | -0/+103 |
| | | |\ \ \ | | | | |/ | | | |/| | Add UltraPlus specific cells to ice40 techlib | ||||
| | | | * | | Remove unnecessary keep attributes | David Shah | 2017-11-18 | 1 | -5/+5 |
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| | | | * | | Merge branch 'master' into up5k | David Shah | 2017-11-17 | 2 | -5/+29 |
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| | | | * | | | Add some UltraPlus cells to ice40 techlib | David Shah | 2017-11-16 | 1 | -0/+103 |
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| | * | | | | | Add Verilog "automatic" keyword (ignored in synthesis) | Clifford Wolf | 2017-11-23 | 2 | -13/+18 |
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| * | | | | | Progress with new BTOR backend | Clifford Wolf | 2017-11-23 | 1 | -8/+109 |
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| * | | | | | Add skeleton for new BTOR back-end | Clifford Wolf | 2017-11-23 | 2 | -0/+216 |
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| * | | | | | Remove old BTOR back-end | Clifford Wolf | 2017-11-23 | 4 | -1174/+0 |
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| * | | | | Accept real-valued delay values | Clifford Wolf | 2017-11-18 | 1 | -0/+1 |
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| * | | | | Merge pull request #452 from cr1901/master | Clifford Wolf | 2017-11-18 | 1 | -4/+20 |
| |\ \ \ \ | | | | | | | | | | | Accommodate Windows-style paths during include-file processing. | ||||
| | * | | | | Accommodate Windows-style paths during include-file processing. | William D. Jones | 2017-11-14 | 1 | -4/+20 |
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| * | | | | Merge pull request #453 from dh73/master | Clifford Wolf | 2017-11-18 | 14 | -9/+316 |
| |\ \ \ \ | |_|/ / |/| | | | Updating Intel FPGA subsystem with Cyclone 10, minor changes in examples/intel directory and Speedster cells | ||||
| | * | | | Fixed the -vout flag to -vqm in examples/intel directory | dh73 | 2017-11-14 | 4 | -4/+4 |
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| | * | | | Initial Cyclone 10 support | dh73 | 2017-11-08 | 5 | -1/+308 |
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| | * | | | Merge https://github.com/cliffordwolf/yosys | dh73 | 2017-11-08 | 25 | -449/+588 |
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