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* tests: use optional ABCEXTERNAL when specifiedGabriel L. Somlo2019-06-274-8/+29
| | | | | | | | | Commits 65924fd1, abc40924, and ebe29b66 hard-code the invocation of yosys-abc, which fails if ABCEXTERNAL was specified during the build. Allow tests to utilize an optional, externally specified abc binary. Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
* Merge pull request #1139 from YosysHQ/dave/check-sim-iverilogEddie Hung2019-06-272-0/+19
|\ | | | | tests: Check that Icarus can parse arch sim models
| * Add simcells.v, simlib.v, and some outputEddie Hung2019-06-271-1/+11
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| * tests: Check that Icarus can parse arch sim modelsDavid Shah2019-06-262-0/+9
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | GrrEddie Hung2019-06-271-1/+1
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* | CapitalisationEddie Hung2019-06-271-1/+1
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* | Make CHANGELOG clearerEddie Hung2019-06-271-0/+1
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* | Merge pull request #1143 from YosysHQ/clifford/fix1135Eddie Hung2019-06-274-8/+38
|\ \ | | | | | | Add "pmux2shiftx -norange"
| * | Add #1135 testcaseEddie Hung2019-06-272-5/+26
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| * | Add "pmux2shiftx -norange", fixes #1135Clifford Wolf2019-06-272-3/+12
| |/ | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | synth_xilinx -arch -> -family, consistent with older synth_intelEddie Hung2019-06-271-7/+8
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* | Merge pull request #1142 from YosysHQ/clifford/fix1132Eddie Hung2019-06-272-6/+345
|\ \ | | | | | | Fix handling of partial covers in muxcover
| * | Copy tests from eddie/fix1132Eddie Hung2019-06-271-0/+320
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| * | Fix handling of partial covers in muxcover, fixes #1132Clifford Wolf2019-06-271-6/+25
| |/ | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Merge pull request #1138 from YosysHQ/koriakin/xc7nocarrymuxEddie Hung2019-06-272-12/+34
|\ \ | |/ |/| synth_xilinx: Add -nocarry and -nowidelut options
| * GrrrEddie Hung2019-06-261-2/+2
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| * Fix spacingEddie Hung2019-06-261-5/+5
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| * Oops. Actually use nocarry flag as spotted by @koriakinEddie Hung2019-06-261-5/+7
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| * synth_ecp5 rename -nomux to -nowidelut, but preserve formerEddie Hung2019-06-261-6/+6
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| * Merge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into ↵Eddie Hung2019-06-261-4/+24
| |\ | | | | | | | | | koriakin/xc7nocarrymux
| | * synth_xilinx: Add -nocarry and -nomux options.Marcin Kościelnicki2019-04-301-7/+26
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* | | Merge pull request #1137 from mmicko/cell_sim_fixClifford Wolf2019-06-262-14/+1
|\ \ \ | | | | | | | | Simulation model verilog fix
| * | | Simulation model verilog fixMiodrag Milanovic2019-06-262-14/+1
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* | | Improve opt_clean handling of unused public wiresClifford Wolf2019-06-261-2/+2
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | Improve BTOR2 handling of undriven wiresClifford Wolf2019-06-261-3/+27
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | Fix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131Clifford Wolf2019-06-261-1/+1
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | Do not clean up buffer cells with "keep" attribute, closes #1128Clifford Wolf2019-06-261-1/+1
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | Escape scope names starting with dollar sign in smtio.pyClifford Wolf2019-06-261-1/+4
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | Add more ECP5 Diamond flip-flops.whitequark2019-06-262-30/+91
|/ / | | | | | | | | This includes all I/O registers, and a few more regular FFs where it was convenient.
* | Add testcase from #335, fixed by #1130Eddie Hung2019-06-251-0/+28
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* | Merge pull request #1130 from YosysHQ/eddie/fix710Clifford Wolf2019-06-253-6/+33
|\ \ | | | | | | memory_dff: walk through more than one mux for computing read enable
| * | Fix spacingEddie Hung2019-06-251-4/+3
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| * | Move only one consumer check outside of while loopEddie Hung2019-06-251-6/+5
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| * | Walk through as many muxes as exist for rd_enEddie Hung2019-06-241-8/+16
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| * | Add testEddie Hung2019-06-242-1/+22
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* | | Merge pull request #1129 from YosysHQ/eddie/ram32x1dEddie Hung2019-06-255-20/+73
|\ \ \ | | | | | | | | Add RAM32X1D support
| * | | Add RAM32X1D supportEddie Hung2019-06-245-20/+73
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* | | Merge pull request #1075 from YosysHQ/eddie/muxpackClifford Wolf2019-06-255-0/+897
|\ \ \ | | | | | | | | Add new "muxpack" command for packing chains of $mux cells
| * | | Merge remote-tracking branch 'origin/master' into eddie/muxpackEddie Hung2019-06-2215-61/+450
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| * | | Cope with $reduce_or common in caseEddie Hung2019-06-211-5/+37
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| * | | Add more testsEddie Hung2019-06-212-21/+51
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| * | | Fix testcaseEddie Hung2019-06-211-3/+4
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| * | | Fix spacingEddie Hung2019-06-211-24/+24
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| * | | Add docEddie Hung2019-06-211-3/+3
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| * | | Add more muxpack tests, with overlapping entriesEddie Hung2019-06-212-1/+84
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| * | | Fix up ExclusiveDatabase with @cliffordwolf's helpEddie Hung2019-06-211-35/+34
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| * | | Merge branch 'master' into eddie/muxpackEddie Hung2019-06-2129-47/+237
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| * \ \ \ Merge remote-tracking branch 'origin/master' into eddie/muxpackEddie Hung2019-06-185-3/+61
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| * | | | | Elaborate muxpack docEddie Hung2019-06-101-2/+6
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| * | | | | Merge remote-tracking branch 'origin/master' into eddie/muxpackEddie Hung2019-06-103-13/+72
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