| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add specify support to README | Clifford Wolf | 2019-04-23 | 1 | -0/+5 |
| * | Improve $specrule interface | Clifford Wolf | 2019-04-23 | 4 | -13/+23 |
| * | Improve $specrule interface | Clifford Wolf | 2019-04-23 | 3 | -24/+24 |
| * | Add $specrule cells for $setup/$hold/$skew specify rules | Clifford Wolf | 2019-04-23 | 9 | -6/+133 |
| * | Preserve $specify[23] cells | Clifford Wolf | 2019-04-23 | 1 | -1/+1 |
| * | Allow $specify[23] cells in blackbox modules | Clifford Wolf | 2019-04-23 | 1 | -0/+6 |
| * | Rename T_{RISE,FALL}_AVG to T_{RISE,FALL}_TYP to better match verilog std nom... | Clifford Wolf | 2019-04-23 | 4 | -76/+76 |
| * | Add $specify2/$specify3 support to write_verilog | Clifford Wolf | 2019-04-23 | 1 | -0/+47 |
| * | Add support for $assert/$assume/$cover to write_verilog | Clifford Wolf | 2019-04-23 | 1 | -0/+10 |
| * | Add CellTypes support for $specify2 and $specify3 | Clifford Wolf | 2019-04-23 | 2 | -0/+7 |
| * | Add InternalCellChecker support for $specify2 and $specify3 | Clifford Wolf | 2019-04-23 | 1 | -7/+21 |
| * | Checking and fixing specify cells in genRTLIL | Clifford Wolf | 2019-04-23 | 1 | -1/+15 |
| * | Un-break default specify parser | Clifford Wolf | 2019-04-23 | 1 | -0/+1 |
| * | Add specify parser | Clifford Wolf | 2019-04-23 | 5 | -33/+253 |
| * | Add $specify2 and $specify3 cells to simlib | Clifford Wolf | 2019-04-23 | 1 | -0/+147 |
| * | Merge pull request #957 from YosysHQ/oai4fix | Clifford Wolf | 2019-04-23 | 2 | -2/+2 |
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| | * | Fixes for OAI4 cell implementation | David Shah | 2019-04-23 | 2 | -2/+2 |
| * | | Format some names using inline code | Eddie Hung | 2019-04-23 | 1 | -2/+2 |
| * | | Fix spelling | Eddie Hung | 2019-04-23 | 1 | -1/+1 |
| * | | Remove some left-over log_dump() | Clifford Wolf | 2019-04-23 | 1 | -2/+0 |
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| * | Merge pull request #914 from YosysHQ/xc7srl | Eddie Hung | 2019-04-22 | 8 | -41/+382 |
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| | * | Update help message | Eddie Hung | 2019-04-22 | 1 | -1/+1 |
| | * | Move 'shregmap -tech xilinx' into map_cells | Eddie Hung | 2019-04-22 | 1 | -17/+20 |
| | * | Merge remote-tracking branch 'origin/master' into xc7srl | Eddie Hung | 2019-04-22 | 39 | -71/+3146 |
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| | * | | Tidy up, fix for -nosrl | Eddie Hung | 2019-04-21 | 2 | -12/+16 |
| | * | | Merge branch 'map_cells_before_map_luts' into xc7srl | Eddie Hung | 2019-04-21 | 1 | -2/+2 |
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| | * | | | Add comments | Eddie Hung | 2019-04-21 | 1 | -0/+7 |
| | * | | | Use new pmux2shiftx from #944, remove my old attempt | Eddie Hung | 2019-04-21 | 4 | -137/+8 |
| | * | | | Merge remote-tracking branch 'origin/clifford/pmux2shiftx' into xc7srl | Eddie Hung | 2019-04-20 | 4 | -0/+894 |
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| | * \ \ \ | Merge remote-tracking branch 'origin/master' into xc7srl | Eddie Hung | 2019-04-20 | 27 | -55/+157 |
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| | * \ \ \ \ | Merge remote-tracking branch 'origin/pmux2shiftx' into xc7srl | Eddie Hung | 2019-04-20 | 2 | -0/+82 |
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| | | * | | | | | Fix ordering of when to insert zero index | Eddie Hung | 2019-04-11 | 1 | -2/+1 |
| | | * | | | | | More unused | Eddie Hung | 2019-04-11 | 1 | -1/+0 |
| | | * | | | | | Remove unused | Eddie Hung | 2019-04-11 | 1 | -1/+0 |
| | | * | | | | | Fixes | Eddie Hung | 2019-04-11 | 1 | -20/+16 |
| | | * | | | | | WIP | Eddie Hung | 2019-04-11 | 2 | -0/+89 |
| | | * | | | | | Spelling fixes | Eddie Hung | 2019-04-11 | 1 | -2/+2 |
| | * | | | | | | Merge remote-tracking branch 'origin' into xc7srl | Eddie Hung | 2019-04-20 | 15 | -104/+193 |
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| | * | | | | | | | $_XILINX_SHREG_ to preserve src attribute | Eddie Hung | 2019-04-08 | 1 | -0/+1 |
| | * | | | | | | | Update CHANGELOG | Eddie Hung | 2019-04-08 | 1 | -1/+1 |
| | * | | | | | | | Merge branch 'undo_pr895' into xc7srl | Eddie Hung | 2019-04-08 | 1 | -17/+3 |
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| | | * | | | | | | | Undo #895 by instead setting an attribute | Eddie Hung | 2019-04-08 | 1 | -17/+3 |
| | * | | | | | | | | Cope with undoing #895 | Eddie Hung | 2019-04-08 | 1 | -14/+26 |
| | * | | | | | | | | Revert "Remove handling for $pmux, since #895" | Eddie Hung | 2019-04-08 | 1 | -0/+40 |
| | * | | | | | | | | Call shregmap twice -- once for variable, another for fixed | Eddie Hung | 2019-04-05 | 3 | -37/+31 |
| | * | | | | | | | | Merge branch 'eddie/fix_retime' into xc7srl | Eddie Hung | 2019-04-05 | 2 | -1/+7 |
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| | * | | | | | | | | | Move dffinit til after abc | Eddie Hung | 2019-04-05 | 3 | -2/+2 |
| | * | | | | | | | | | Merge branch 'eddie/fix_retime' into xc7srl | Eddie Hung | 2019-04-05 | 11 | -14/+85 |
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| | * | | | | | | | | | | techmap inside map_cells stage | Eddie Hung | 2019-04-05 | 2 | -2/+1 |
| | * | | | | | | | | | | Merge branch 'map_cells_before_map_luts' into xc7srl | Eddie Hung | 2019-04-04 | 1 | -0/+1 |
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