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Merge pull request #694 from trcwm/dffmap_expr_fix
Clifford Wolf
2018-11-06
1
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+10
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DFFLIBMAP: changed 'missing pin' error into a warning with additional reason/...
Niels Moseley
2018-11-06
1
-1
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+10
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Run solver in non-incremental mode whem smtio.py is configured for non-increm...
Clifford Wolf
2018-11-06
1
-3
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+12
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Update ABC rev to 4d56acf
Clifford Wolf
2018-11-06
1
-1
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+1
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Allow square brackets in liberty identifiers
Clifford Wolf
2018-11-05
2
-3
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+4
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Merge pull request #691 from arjenroodselaar/stacksize
Clifford Wolf
2018-11-05
1
-1
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+6
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Use conservative stack size for SMT2 on MacOS
Arjen Roodselaar
2018-11-04
1
-1
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+6
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Add warning for SV "restrict" without "property"
Clifford Wolf
2018-11-04
1
-2
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+11
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Add proper error message for when smtbmc "append" fails
Clifford Wolf
2018-11-04
1
-2
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+10
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Various indenting fixes in AST front-end (mostly space vs tab issues)
Clifford Wolf
2018-11-04
3
-99
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+69
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Merge pull request #687 from trcwm/master
Clifford Wolf
2018-11-04
2
-4
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+10
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Liberty file newline handling is more relaxed. More descriptive error message
Niels Moseley
2018-11-03
1
-4
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+7
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Report an error when a liberty file contains pin references that reference no...
Niels Moseley
2018-11-03
1
-0
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+3
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Merge pull request #688 from ZipCPU/rosenfell
Clifford Wolf
2018-11-04
1
-2
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+8
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Make and dependent upon LSB only
ZipCPU
2018-11-03
1
-2
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Do not generate "reg assigned in a continuous assignment" warnings for "rand ...
Clifford Wolf
2018-11-01
1
-2
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+15
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Add support for signed $shift/$shiftx in smt2 back-end
Clifford Wolf
2018-11-01
1
-1
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+3
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Merge branch 'igloo2'
Clifford Wolf
2018-10-31
5
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+377
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Fix sf2 LUT interface
Clifford Wolf
2018-10-31
2
-12
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+12
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Basic SmartFusion2 and IGLOO2 synthesis support
Clifford Wolf
2018-10-31
5
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+377
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Merge pull request #680 from jburgess777/fix-empty-string-back-assert
Clifford Wolf
2018-10-30
1
-1
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Avoid assert when label is an empty string
Jon Burgess
2018-10-28
1
-1
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Merge pull request #678 from whentze/master
Clifford Wolf
2018-10-25
1
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+2
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fix unhandled std::out_of_range when calling yosys with 3-character argument
whentze
2018-10-22
1
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+2
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Fix minor typo in error message
Clifford Wolf
2018-10-25
1
-1
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+1
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Merge pull request #679 from udif/pr_syntax_error
Clifford Wolf
2018-10-25
14
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+78
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Rename the generic "Syntax error" message from the Verilog/SystemVerilog pars...
Udi Finkelstein
2018-10-25
14
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+78
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Merge pull request #677 from daveshah1/ecp5_dsp
Clifford Wolf
2018-10-23
3
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+97
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ecp5: Remove DSP parameters that don't work
David Shah
2018-10-22
1
-21
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ecp5: Add DSP blackboxes
David Shah
2018-10-21
3
-1
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+118
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Improve read_verilog range out of bounds warning
Clifford Wolf
2018-10-20
1
-6
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+6
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Merge pull request #674 from rubund/feature/svinterface_at_top
Clifford Wolf
2018-10-20
11
-70
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+599
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Refactor code to avoid code duplication + added comments
Ruben Undheim
2018-10-20
4
-136
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+113
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Support for SystemVerilog interfaces as a port in the top level module + test...
Ruben Undheim
2018-10-20
9
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+561
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Fixed memory leak
Ruben Undheim
2018-10-20
1
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Merge pull request #673 from daveshah1/ecp5_improve
Clifford Wolf
2018-10-19
4
-6
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+17
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ecp5: Sim model fixes
David Shah
2018-10-19
1
-3
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+5
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ecp5: Add latch inference
David Shah
2018-10-19
3
-3
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+12
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Merge pull request #672 from daveshah1/fix_bram
Clifford Wolf
2018-10-19
1
-0
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+1
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memory_bram: Reset make_outreg when growing read ports
David Shah
2018-10-19
1
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+1
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Merge pull request #671 from rafaeltp/master
Clifford Wolf
2018-10-19
1
-2
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+3
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adding offset info to memories
rafaeltp
2018-10-18
1
-1
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adding offset info to memories
rafaeltp
2018-10-18
1
-2
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+3
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Merge pull request #670 from rubund/feature/basic_svinterface_test
Clifford Wolf
2018-10-19
6
-9
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+248
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Basic test for checking correct synthesis of SystemVerilog interfaces
Ruben Undheim
2018-10-18
6
-9
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+248
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Update ABC to git rev 14d985a
Clifford Wolf
2018-10-18
1
-1
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+1
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Merge pull request #659 from rubund/sv_interfaces
Clifford Wolf
2018-10-18
11
-21
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+649
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Handle FIXME for modport members without type directly in front
Ruben Undheim
2018-10-13
1
-6
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+8
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Documentation improvements etc.
Ruben Undheim
2018-10-13
5
-38
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+77
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Fix build error with clang
Ruben Undheim
2018-10-12
1
-1
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+1
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