iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
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*	Added add_share_file Makefile macro	Clifford Wolf	2015-01-08	3	-38/+17
*	added minimalistic xilinx sim models	Clifford Wolf	2015-01-08	1	-0/+150
*	disabled problematic mux -> and/or transform	Clifford Wolf	2015-01-07	1	-2/+7
*	More Xilinx bram cleanups	Clifford Wolf	2015-01-07	1	-14/+14
*	Cleanups in xilinx bram descriptions	Clifford Wolf	2015-01-07	2	-36/+36
*	memory_bram hotfix for memories with width 1	Clifford Wolf	2015-01-06	1	-3/+3
*	Xilinx RAMB36/RAMB18 memory_bram support complete	Clifford Wolf	2015-01-06	3	-16/+320
*	Towards Xilinx bram support	Clifford Wolf	2015-01-06	3	-24/+65
*	small fix in xilinx/brams.v	Clifford Wolf	2015-01-06	1	-5/+5
*	fixed compiler warning on non-linux archs	Clifford Wolf	2015-01-06	1	-2/+4
*	removed old debug code	Clifford Wolf	2015-01-06	1	-1/+0
*	hashlib iterator fix	Clifford Wolf	2015-01-06	1	-4/+4
*	build fix for mxe	Clifford Wolf	2015-01-06	1	-7/+8
*	Towards Xilinx bram support	Clifford Wolf	2015-01-06	5	-26/+176
*	Various small improvements to synth_xilinx	Clifford Wolf	2015-01-06	2	-10/+8
*	Towards Xilinx bram support	Clifford Wolf	2015-01-06	3	-14/+42
*	Towards Xilinx bram support	Clifford Wolf	2015-01-06	3	-6/+10
*	dict<> ref vs insert bugfix	Clifford Wolf	2015-01-06	1	-10/+13
*	Towards Xilinx bram support	Clifford Wolf	2015-01-05	8	-19/+175
*	Towards Xilinx bram support	Clifford Wolf	2015-01-04	4	-16/+186
*	Added memory_bram "shuffle_enable" feature	Clifford Wolf	2015-01-04	2	-1/+117
*	Removed left over debug code from memory_bram	Clifford Wolf	2015-01-04	1	-2/+2
*	Fixed pattern matching in "hierarchy -generate"	Clifford Wolf	2015-01-04	1	-2/+2
*	Print non-errors to stdout	Clifford Wolf	2015-01-03	3	-2/+11
*	Added "memory -bram"	Clifford Wolf	2015-01-03	2	-3/+12
*	Added memory_bram 'or_next_if_better' feature	Clifford Wolf	2015-01-03	2	-45/+162
*	memory_bram transp support	Clifford Wolf	2015-01-03	2	-46/+88
*	Progress in memory_bram	Clifford Wolf	2015-01-03	5	-25/+25
*	Cosmetic changes in verilog output format	Clifford Wolf	2015-01-02	1	-5/+10
*	Added proper clkpol support to memory_bram	Clifford Wolf	2015-01-02	3	-6/+34
*	Fixes and improvements in bram test	Clifford Wolf	2015-01-02	1	-20/+8
*	Progress in bram testbench	Clifford Wolf	2015-01-02	1	-11/+28
*	Define YOSYS and SYNTHESIS in preproc	Clifford Wolf	2015-01-02	1	-1/+2
*	New $mem simlib model	Clifford Wolf	2015-01-02	1	-95/+36
*	Progress in memory_bram	Clifford Wolf	2015-01-02	5	-16/+18
*	Progress in memory_bram	Clifford Wolf	2015-01-02	4	-23/+42
*	Progress in bram testbench	Clifford Wolf	2015-01-01	3	-42/+184
*	Bram testbench (incomplete)	Clifford Wolf	2015-01-01	2	-0/+120
*	Progress in memory_bram	Clifford Wolf	2015-01-01	1	-22/+207
*	Fixed memory->start_offset handling	Clifford Wolf	2015-01-01	3	-6/+12
*	Progress in memory_bram	Clifford Wolf	2015-01-01	1	-37/+145
*	Removed SigSpec::extend_xx() api	Clifford Wolf	2015-01-01	3	-20/+1
*	Progress in memory_bram	Clifford Wolf	2014-12-31	4	-15/+127
*	Added memory_bram (not functional yet)	Clifford Wolf	2014-12-31	4	-1/+307
*	Added hashlib .count(key, iterator) and it1 < it2	Clifford Wolf	2014-12-31	2	-38/+57
*	Improvements in CodingReadme	Clifford Wolf	2014-12-31	2	-17/+37
*	improved bitpattern (proc_mux) performance	Clifford Wolf	2014-12-31	1	-22/+43
*	hashlib cleanups and a fix	Clifford Wolf	2014-12-31	1	-17/+17
*	gcc-4.6 compile fixes	Clifford Wolf	2014-12-31	1	-4/+4
*	new hashlib::pool<> (derived from new dict)	Clifford Wolf	2014-12-31	1	-221/+151