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Merge pull request #1249 from mmicko/anlogic_fix
Clifford Wolf
2019-08-07
1
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+8
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anlogic : Fix alu mapping
Miodrag Milanovic
2019-08-03
1
-16
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+8
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Merge pull request #1252 from YosysHQ/clifford/fix1231
Clifford Wolf
2019-08-07
1
-15
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+2
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Fix handling of functions/tasks without top-level begin-end block, fixes #1231
Clifford Wolf
2019-08-06
1
-15
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+2
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Merge pull request #1253 from YosysHQ/clifford/check
Clifford Wolf
2019-08-07
3
-9
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+17
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Be less aggressive with running design->check()
Clifford Wolf
2019-08-06
3
-9
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+17
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Merge pull request #1257 from YosysHQ/clifford/cellcosts
Clifford Wolf
2019-08-07
3
-109
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+103
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Tweak default gate costs, cleanup "stat -tech cmos"
Clifford Wolf
2019-08-07
2
-20
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+10
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Redesign of cell cost API
Clifford Wolf
2019-08-07
2
-93
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+97
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Update CHANGELOG
David Shah
2019-08-07
1
-0
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+2
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Merge pull request #1241 from YosysHQ/clifford/jsonfix
David Shah
2019-08-07
2
-36
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+71
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Update JSON front-end to process new attr/param encoding
Clifford Wolf
2019-08-01
1
-23
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+34
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Implement improved JSON attr/param encoding
Clifford Wolf
2019-08-01
1
-13
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+37
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Merge pull request #1232 from YosysHQ/dave/write_gzip
David Shah
2019-08-06
4
-7
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+79
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Add test for writing gzip-compressed files
David Shah
2019-08-06
2
-0
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+18
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Add support for writing gzip-compressed files
David Shah
2019-08-06
2
-7
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+61
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Merge pull request #1251 from YosysHQ/clifford/nmux
Clifford Wolf
2019-08-06
19
-42
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+174
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Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs
Clifford Wolf
2019-08-06
19
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+174
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Merge pull request #1242 from jfng/fix-proc_prune-partial
whitequark
2019-08-03
1
-2
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+11
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proc_prune: Promote partially redundant assignments.
Jean-François Nguyen
2019-08-01
1
-2
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+11
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Merge pull request #1238 from mmicko/vsbuild_fix
Clifford Wolf
2019-08-02
2
-1
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+2
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Visual Studio build fix
Miodrag Milanovic
2019-07-31
2
-1
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+2
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Merge pull request #1239 from mmicko/mingw_fix
Clifford Wolf
2019-08-02
11
-25
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+37
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Fix linking issue for new mxe and pthread
Miodrag Milanovic
2019-08-01
1
-1
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+2
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Fix yosys linking for mxe
Miodrag Milanovic
2019-08-01
1
-1
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+1
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New mxe hacks needed to support 2ca237e
Miodrag Milanovic
2019-08-01
1
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+4
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Fix formatting for msys2 mingw build using GetSize
Miodrag Milanovic
2019-08-01
10
-23
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+30
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Merge pull request #1236 from YosysHQ/eddie/xc6s_brams_map
Eddie Hung
2019-08-01
1
-3
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+3
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RST -> RSTBRST for RAMB8BWER
Eddie Hung
2019-07-29
1
-3
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+3
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Merge pull request #1233 from YosysHQ/clifford/defer
Clifford Wolf
2019-07-31
2
-49
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+21
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Update README to use "read" instead of "read_verilog"
Clifford Wolf
2019-07-29
1
-48
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+19
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Call "read_verilog" with -defer from "read"
Clifford Wolf
2019-07-29
1
-1
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+2
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Merge pull request #1228 from YosysHQ/dave/yy_buf_size
Eddie Hung
2019-07-29
1
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+3
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verilog_lexer: Increase YY_BUF_SIZE to 65536
David Shah
2019-07-26
1
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+3
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Merge pull request #1234 from mmicko/fix_gzip_no_exist
David Shah
2019-07-29
1
-19
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+21
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Fix case when file does not exist
Miodrag Milanovic
2019-07-29
1
-19
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+21
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Merge pull request #1226 from YosysHQ/dave/gzip
David Shah
2019-07-27
8
-13
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+70
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Update CHANGELOG
David Shah
2019-07-26
1
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+1
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Fix frontend auto-detection for gzipped input
David Shah
2019-07-26
1
-9
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+12
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Add support for reading gzip'd input files
David Shah
2019-07-26
6
-3
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+57
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Merge branch 'master' of github.com:YosysHQ/yosys
Eddie Hung
2019-07-25
17
-29
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+360
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Merge branch 'ZirconiumX-synth_intel_m9k'
Clifford Wolf
2019-07-25
4
-5
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+11
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intel: Map M9K BRAM only on families that have it
Dan Ravensloft
2019-07-23
4
-5
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+12
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Merge pull request #1218 from ZirconiumX/synth_intel_iopads
Clifford Wolf
2019-07-25
1
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+8
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intel: Make -noiopads the default
Dan Ravensloft
2019-07-24
1
-8
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+8
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Merge pull request #1219 from jakobwenzel/objIterator
Clifford Wolf
2019-07-25
2
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+20
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replaced std::iterator with using statements
Jakob Wenzel
2019-07-25
1
-6
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+6
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made ObjectIterator extend std::iterator
Jakob Wenzel
2019-07-24
2
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+19
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Merge pull request #1224 from YosysHQ/xilinx_fix_ff
Eddie Hung
2019-07-25
1
-2
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+2
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xilinx: Fix missing cell name underscore in cells_map.v
David Shah
2019-07-25
1
-2
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