| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | | | Added "equiv_add -cell" | Clifford Wolf | 2015-10-25 | 2 | -34/+95 | |
| * | | | equiv_struct now creates equiv_merged attributes | Clifford Wolf | 2015-10-25 | 1 | -0/+3 | |
| * | | | Improvements in equiv_struct | Clifford Wolf | 2015-10-24 | 1 | -1/+22 | |
| * | | | renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit() | Clifford Wolf | 2015-10-24 | 8 | -34/+34 | |
| * | | | improvement in "stat" | Clifford Wolf | 2015-10-24 | 1 | -1/+1 | |
| * | | | Fixed driver conflict handling (various cmds) | Clifford Wolf | 2015-10-24 | 1 | -3/+12 | |
| * | | | equiv_purge bugfix, using SigChunk in Yosys namespace | Clifford Wolf | 2015-10-24 | 5 | -5/+8 | |
| * | | | Fixed handling of driver-driver conflicts in wreduce | Clifford Wolf | 2015-10-24 | 3 | -9/+42 | |
| * | | | Added equiv_mark command | Clifford Wolf | 2015-10-23 | 3 | -1/+265 | |
| * | | | Disabled "Skipping blackbox module" msg in show command | Clifford Wolf | 2015-10-23 | 1 | -1/+1 | |
| * | | | Added support for ":" as comment symbol after ;-parsing | Clifford Wolf | 2015-10-23 | 1 | -1/+1 | |
| * | | | Also merge $equiv cells in equiv_struct | Clifford Wolf | 2015-10-23 | 1 | -0/+1 | |
| * | | | Improvements in equiv_struct | Clifford Wolf | 2015-10-23 | 1 | -11/+18 | |
| * | | | Added equiv_purge | Clifford Wolf | 2015-10-22 | 2 | -0/+210 | |
| * | | | Added equiv_struct command | Clifford Wolf | 2015-10-21 | 2 | -0/+188 | |
| * | | | Improved inout handling in equiv_make | Clifford Wolf | 2015-10-21 | 1 | -1/+1 | |
| * | | | Progress on cell help messages | Clifford Wolf | 2015-10-20 | 1 | -18/+114 | |
| * | | | Progress on cell help messages | Clifford Wolf | 2015-10-17 | 3 | -54/+107 | |
| * | | | Progress in yosys-smtbmc | Clifford Wolf | 2015-10-15 | 1 | -4/+10 | |
| * | | | Fixed bug in verilog parser | Clifford Wolf | 2015-10-15 | 1 | -1/+1 | |
| * | | | Improvements in yosys-smtbmc | Clifford Wolf | 2015-10-15 | 3 | -2/+9 | |
| * | | | Bugfixes in handling of "keep" attribute on wires | Clifford Wolf | 2015-10-15 | 2 | -2/+8 | |
| * | | | More "yosys-smtbmc -c" fixes | Clifford Wolf | 2015-10-14 | 2 | -9/+30 | |
| * | | | Fixed yosys-smtbmc -c | Clifford Wolf | 2015-10-14 | 1 | -2/+2 | |
| * | | | Added "prep" command | Clifford Wolf | 2015-10-14 | 2 | -0/+157 | |
| * | | | Added more cell descriptions | Clifford Wolf | 2015-10-14 | 1 | -0/+85 | |
| * | | | Added first help messages for cell types | Clifford Wolf | 2015-10-14 | 6 | -6/+336 | |
| * | | | Added yosys-smtbmc copyright | Clifford Wolf | 2015-10-14 | 3 | -1/+36 | |
| * | | | Improvements in yosys-smtbmc | Clifford Wolf | 2015-10-14 | 3 | -21/+38 | |
| * | | | Added yosys-smtbmc | Clifford Wolf | 2015-10-14 | 2 | -1/+20 | |
| * | | | Implemented smtbmc.py -i | Clifford Wolf | 2015-10-14 | 1 | -25/+60 | |
| * | | | Added smtbmc.py | Clifford Wolf | 2015-10-13 | 4 | -0/+409 | |
| * | | | Added write_smt2 -wires | Clifford Wolf | 2015-10-13 | 1 | -7/+15 | |
| * | | | Added examples/ top-level directory | Clifford Wolf | 2015-10-13 | 17 | -4/+7 | |
| * | | | SystemVerilog also has assume(), added implicit -D FORMAL | Clifford Wolf | 2015-10-13 | 3 | -4/+5 | |
| * | | | Merge branch 'master' of https://github.com/rubund/yosys | Clifford Wolf | 2015-10-13 | 1 | -18/+18 | |
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| | * | | | Use DESTDIR as defined in https://www.gnu.org/prep/standards/html_node/DESTDI... | Ruben Undheim | 2015-10-11 | 1 | -13/+13 | |
| | * | | | Use LDFLAGS, CXXFLAGS and CPPFLAGS from the environment when building | Ruben Undheim | 2015-10-11 | 1 | -7/+7 | |
| * | | | | Fixed "flatten" for unconnected inout ports | Clifford Wolf | 2015-10-13 | 1 | -1/+1 | |
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| * | | | Added support for "parameter" and "localparam" in global context | Clifford Wolf | 2015-10-07 | 1 | -0/+2 | |
| * | | | Fixed complexity of assigning to vectors in constant functions | Clifford Wolf | 2015-10-01 | 1 | -0/+3 | |
| * | | | Fixed detection of unconditional $readmem[hb] | Clifford Wolf | 2015-09-30 | 1 | -4/+11 | |
| * | | | Added edgetypes command | Clifford Wolf | 2015-09-27 | 2 | -0/+107 | |
| * | | | Some cleanups in qwp | Clifford Wolf | 2015-09-26 | 1 | -7/+16 | |
| * | | | Added "test_cell -noeval" | Clifford Wolf | 2015-09-25 | 1 | -1/+10 | |
| * | | | Added wreduce $mul support and fixed signed $mul opt_const bug | Clifford Wolf | 2015-09-25 | 2 | -5/+37 | |
| * | | | Bugfix in bram read-enable code | Clifford Wolf | 2015-09-25 | 1 | -2/+5 | |
| * | | | Bugfixes in $readmem[hb] | Clifford Wolf | 2015-09-25 | 1 | -4/+7 | |
| * | | | Bugfixes in writing of memories as Verilog | Clifford Wolf | 2015-09-25 | 1 | -7/+8 | |
| * | | | Fixed segfault in AstNode::asReal | Clifford Wolf | 2015-09-25 | 1 | -1/+1 | |
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index : iCE40/yosys | |
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