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| * | | | | | | | | | | | | | Try command in another moduleEddie Hung2019-06-281-0/+3
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* | | | | | | | | | | | | | | Fix $__XILINX_MUXF78 box timingEddie Hung2019-07-011-1/+1
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* | | | | | | | | | | | | | | Revert "Fix broken MUXFx box, use MUXF7x2 box instead"Eddie Hung2019-07-013-37/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit a9a140aa6c84e71edc1a244cfe363400c7e09d90.
* | | | | | | | | | | | | | | Fix broken MUXFx box, use MUXF7x2 box insteadEddie Hung2019-07-013-36/+37
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* | | | | | | | | | | | | | | SpaceEddie Hung2019-07-011-0/+1
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* | | | | | | | | | | | | | | Move wide mux from yosys-0.8 to 0.9Eddie Hung2019-07-011-8/+2
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* | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-07-011-5/+11
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| * | | | | | | | | | | | | | Move abc9 from yosys-0.8 to yosys-0.9 in CHANGELOGEddie Hung2019-07-011-5/+11
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| * | | | | | | | | | | | | | Merge branch 'master' of github.com:YosysHQ/yosysEddie Hung2019-07-013-0/+4
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| * | | | | | | | | | | | | | autotest.sh to define _AUTOTB when test_autotbEddie Hung2019-06-281-1/+1
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* | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-294-16/+10
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| * | | | | | | | | | | | | | install *_nowide.lut filesEddie Hung2019-06-292-0/+3
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| * | | | | | | | | | | | | | Merge pull request #1149 from gsomlo/gls-1098-abcext-fixupEddie Hung2019-06-281-0/+1
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |/ / / / / / / / / / / / / | |/| | | | | | | | | | | | | Make abc9 pass aware of optional ABCEXTERNAL override
| | * | | | | | | | | | | | | Make abc9 pass aware of optional ABCEXTERNAL overrideGabriel L. Somlo2019-06-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
* | | | | | | | | | | | | | | autotest.sh to define _AUTOTB when test_autotbEddie Hung2019-06-281-1/+1
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* | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/eddie/script_from_wire' into xc7muxEddie Hung2019-06-283-8/+62
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| * | | | | | | | | | | | | | Add to CHANGELOGEddie Hung2019-06-281-0/+6
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| * | | | | | | | | | | | | | Support ability for "script -select" to take commands from wiresEddie Hung2019-06-281-8/+39
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| * | | | | | | | | | | | | | Add testEddie Hung2019-06-281-0/+17
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* | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-280-0/+0
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| * | | | | | | | | | | | | Replace log_assert() with meaningful log_error()Eddie Hung2019-06-281-1/+5
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| * | | | | | | | | | | | | Remove peepopt call in synth_xilinx since already in synth -run coarseEddie Hung2019-06-281-5/+0
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* | | | | | | | | | | | | Restore $__XILINX_MUXF78 const optimisationEddie Hung2019-06-281-24/+24
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* | | | | | | | | | | | | Clean up trimming leading 1'bx in A during techmappnigEddie Hung2019-06-281-15/+9
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* | | | | | | | | | | | | Fix CARRY4 abc_box_idEddie Hung2019-06-281-1/+1
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* | | | | | | | | | | | | Replace log_assert() with meaningful log_error()Eddie Hung2019-06-281-1/+5
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* | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-281-0/+3
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| * | | | | | | | | | | | Add missing CHANGELOG entriesEddie Hung2019-06-281-0/+3
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* | | | | | | | | | | | | Update CHANGELOG with -widemuxEddie Hung2019-06-281-1/+1
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* | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-280-0/+0
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| * | | | | | | | | | | | Fix spacingEddie Hung2019-06-281-2/+2
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* | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-2822-171/+335
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| * | | | | | | | | | | | Merge pull request #1098 from YosysHQ/xaigEddie Hung2019-06-2845-247/+3642
| |\ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | "abc9" pass for timing-aware techmapping (experimental, FPGA only, no FFs)
| | * | | | | | | | | | | | Add generic __builtin_bswap32 functionEddie Hung2019-06-281-0/+15
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| | * | | | | | | | | | | | Also fix write_aiger for UBEddie Hung2019-06-281-26/+26
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| | * | | | | | | | | | | | Fix more potential for undefined behaviour due to container invalidationEddie Hung2019-06-281-6/+10
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| | * | | | | | | | | | | | Update synth_ice40 -device doc to be relevant for -abc9 onlyEddie Hung2019-06-281-2/+2
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| | * | | | | | | | | | | | Disable boxing of ECP5 dist RAM due to regressionEddie Hung2019-06-281-1/+1
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| | * | | | | | | | | | | | Add write address to abc_scc_break of ECP5 dist RAMEddie Hung2019-06-281-1/+1
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| | * | | | | | | | | | | | Fix DO4 typoEddie Hung2019-06-281-1/+1
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| | * | | | | | | | | | | | Reduce diff with upstreamEddie Hung2019-06-271-4/+2
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| | * | | | | | | | | | | | Extraneous newlineEddie Hung2019-06-271-1/+0
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| | * | | | | | | | | | | | Remove noise from ice40/cells_sim.vEddie Hung2019-06-271-5/+0
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| | * | | | | | | | | | | | Refactor for one "abc_carry" attribute on moduleEddie Hung2019-06-275-82/+84
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| | * | | | | | | | | | | | Merge branch 'xaig' of github.com:YosysHQ/yosys into xaigEddie Hung2019-06-272-0/+19
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| | | * \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-272-0/+19
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| | * | | | | | | | | | | | | Do not use Module::remove() iterator versionEddie Hung2019-06-271-5/+6
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| | * | | | | | | | | | | | | Remove redundant docEddie Hung2019-06-271-3/+0
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| | * | | | | | | | | | | | | Remove &retime when abc9 -fastEddie Hung2019-06-271-1/+1
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| | * | | | | | | | | | | | | Cleanup abc9.ccEddie Hung2019-06-271-15/+17
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