| Commit message (Expand) | Author | Age | Files | Lines | ||
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| * | | | | | | | Merge branch 'master' of https://github.com/bogdanvuk/yosys into clifford/ext... | Clifford Wolf | 2019-06-20 | 5 | -10/+423 | |
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| | * | | | | | | Move netlist helper module to passes/opt for the time being | Bogdan Vukobratovic | 2019-06-14 | 2 | -1/+1 | |
| | * | | | | | | Merge remote-tracking branch 'upstream/master' | Bogdan Vukobratovic | 2019-06-14 | 73 | -475/+1352 | |
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| | * | | | | | | | Prepare for situation when port of the signal cannot be found | Bogdan Vukobratovic | 2019-06-14 | 2 | -2/+8 | |
| | * | | | | | | | Some cleanup, revert sat.cc | Bogdan Vukobratovic | 2019-06-14 | 2 | -13/+11 | |
| | * | | | | | | | Implement disconnection of constant register bits | Bogdan Vukobratovic | 2019-06-13 | 2 | -44/+109 | |
| | * | | | | | | | Pass SigBit by value to Netlist algorithms | Bogdan Vukobratovic | 2019-06-13 | 1 | -65/+84 | |
| | * | | | | | | | Rename satgen_algo.h -> algo.h, code cleanup and refactoring | Bogdan Vukobratovic | 2019-06-12 | 4 | -279/+265 | |
| | * | | | | | | | Generate satgen instance instead of calling sat pass | Bogdan Vukobratovic | 2019-06-11 | 2 | -24/+129 | |
| | * | | | | | | | Refactor driver map generation | Bogdan Vukobratovic | 2019-06-10 | 1 | -0/+158 | |
| | * | | | | | | | Fix the regression | Bogdan Vukobratovic | 2019-05-28 | 1 | -1/+2 | |
| | * | | | | | | | Merge remote-tracking branch 'upstream/master' | Bogdan Vukobratovic | 2019-05-28 | 1 | -1/+11 | |
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| | * | | | | | | | | Optimizing DFFs whose initial value prevents their value from changing | Bogdan Vukobratovic | 2019-05-28 | 4 | -3/+78 | |
| * | | | | | | | | | Fix typo | Clifford Wolf | 2019-06-20 | 1 | -2/+2 | |
| * | | | | | | | | | Merge branch 'towoe-unpacked_arrays' | Clifford Wolf | 2019-06-20 | 2 | -1/+23 | |
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| | * | | | | | | | | Add proper test for SV-style arrays | Clifford Wolf | 2019-06-20 | 3 | -6/+16 | |
| | * | | | | | | | | Merge branch 'unpacked_arrays' of https://github.com/towoe/yosys-sv into towo... | Clifford Wolf | 2019-06-20 | 3 | -1/+13 | |
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| | * | | | | | | | | Unpacked array declaration using size | Tobias Wölfel | 2019-06-19 | 3 | -1/+13 | |
| * | | | | | | | | | Merge pull request #1111 from acw1251/help_summary_fixes | Eddie Hung | 2019-06-19 | 4 | -6/+6 | |
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| | * | | | | | | | | | Fixed small typo in ice40_unlut help summary | acw1251 | 2019-06-19 | 1 | -1/+1 | |
| | * | | | | | | | | | Fixed the help summary line for a few commands | acw1251 | 2019-06-19 | 4 | -6/+6 | |
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| * | | | | | | | | | Fix bug in #1078, add entry to CHANGELOG | Eddie Hung | 2019-06-19 | 2 | -3/+4 | |
| * | | | | | | | | | Merge pull request #1109 from YosysHQ/clifford/fix1106 | Clifford Wolf | 2019-06-19 | 6 | -9/+48 | |
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| | * | | | | | | | | | Add "read_verilog -pwires" feature, closes #1106 | Clifford Wolf | 2019-06-19 | 6 | -9/+48 | |
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| * | | | | | | | | | Merge pull request #1105 from YosysHQ/clifford/fixlogicinit | Clifford Wolf | 2019-06-19 | 5 | -16/+92 | |
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| | * | | | | | | | | | Add defvalue test, minor autotest fixes for .sv files | Clifford Wolf | 2019-06-19 | 2 | -14/+37 | |
| | * | | | | | | | | | Use input default values in hierarchy pass | Clifford Wolf | 2019-06-19 | 1 | -0/+38 | |
| | * | | | | | | | | | Add defaultvalue attribute | Clifford Wolf | 2019-06-19 | 2 | -0/+15 | |
| | * | | | | | | | | | Fix handling of "logic" variables with initial value | Clifford Wolf | 2019-06-19 | 1 | -2/+2 | |
| * | | | | | | | | | | Make tests/aiger less chatty | Clifford Wolf | 2019-06-19 | 1 | -4/+6 | |
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| * | | | | | | | | | Merge pull request #1100 from bwidawsk/home | Clifford Wolf | 2019-06-19 | 5 | -0/+8 | |
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| | * | | | | | | | | | Support filename rewrite in backends | Ben Widawsky | 2019-06-18 | 4 | -0/+4 | |
| | * | | | | | | | | | Support ~ for home directory | Ben Widawsky | 2019-06-18 | 1 | -0/+4 | |
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| * | | | | | | | | | Merge pull request #1104 from whitequark/case-semantics | Clifford Wolf | 2019-06-19 | 2 | -1/+40 | |
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| | * | | | | | | | | Explain exact semantics of switch and case rules in the manual. | whitequark | 2019-06-19 | 1 | -0/+12 | |
| | * | | | | | | | | In RTLIL::Module::check(), check process invariants. | whitequark | 2019-06-19 | 1 | -1/+28 | |
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| * | | | | | | | | Merge pull request #1086 from udif/pr_elab_sys_tasks2 | Clifford Wolf | 2019-06-18 | 2 | -3/+13 | |
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| | * | | | | | | | Fixed brojen $error()/$info/$warning() on non-generate blocks | Udi Finkelstein | 2019-06-11 | 2 | -3/+13 | |
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| * | | | | | | | Add timescale and generated-by header to yosys-smtbmc MkVcd | Clifford Wolf | 2019-06-16 | 1 | -0/+2 | |
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| * | | | | | | Merge pull request #829 from abdelrahmanhosny/master | Serge Bazanski | 2019-06-13 | 2 | -0/+46 | |
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| | * | | | | | address review comments | Abdelrahman | 2019-03-01 | 1 | -23/+9 | |
| | * | | | | | add dockerignore file | Abdelrahman | 2019-02-26 | 1 | -0/+13 | |
| | * | | | | | dockerize yosys | Abdelrahman | 2019-02-26 | 1 | -0/+47 | |
| * | | | | | | Add some more comments | Eddie Hung | 2019-06-10 | 1 | -1/+6 | |
| * | | | | | | Merge pull request #1082 from corecode/u4k | David Shah | 2019-06-10 | 1 | -0/+24 | |
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| | * | | | | | | ice40/cells_sim.v: Add support for RGB_DRV/LED_DRV_CUR for u4k | Simon Schubert | 2019-06-10 | 1 | -0/+24 | |
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| * | | | | | | Merge pull request #1078 from YosysHQ/eddie/muxcover_costs | Clifford Wolf | 2019-06-08 | 1 | -12/+42 | |
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| | * | | | | | Allow muxcover costs to be changed | Eddie Hung | 2019-06-07 | 1 | -12/+42 | |
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| * | | | | | Fix spacing from spaces to tabs | Eddie Hung | 2019-06-07 | 1 | -362/+362 | |
| * | | | | | Merge pull request #1079 from YosysHQ/eddie/fix_read_aiger | Clifford Wolf | 2019-06-07 | 27 | -45/+128 | |
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index : iCE40/yosys | |
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