| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Do not check for 1 and 0 only | Miodrag Milanovic | 2020-08-30 | 1 | -6/+0 |
| * | Fix import of VHDL enums | Miodrag Milanovic | 2020-08-30 | 1 | -11/+22 |
| * | Bump version | Yosys Bot | 2020-08-30 | 1 | -1/+1 |
| * | write_smt2: fix SMT-LIB tutorial URL | whitequark | 2020-08-29 | 1 | -1/+1 |
| * | Bump version | Yosys Bot | 2020-08-29 | 1 | -1/+1 |
| * | intel_alm: better map wide but shallow multiplies | Dan Ravensloft | 2020-08-28 | 1 | -2/+6 |
| * | Bump version | Yosys Bot | 2020-08-28 | 1 | -1/+1 |
| * | Merge pull request #2364 from whitequark/manual-typo | Miodrag Milanović | 2020-08-27 | 1 | -1/+1 |
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| | * | manual: fix typo. | whitequark | 2020-08-27 | 1 | -1/+1 |
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| * | Merge pull request #2357 from whitequark/cxxflags-MP | whitequark | 2020-08-27 | 1 | -1/+1 |
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| | * | Add -MP to CXXFLAGS. | whitequark | 2020-08-26 | 1 | -1/+1 |
| * | | Merge pull request #2356 from whitequark/flatten-techmap-no-tpl_driven-sigmap | whitequark | 2020-08-27 | 3 | -9/+17 |
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| | * | | flatten, techmap: don't canonicalize tpl driven bits via sigmap. | whitequark | 2020-08-26 | 3 | -9/+17 |
| * | | | Merge pull request #2358 from whitequark/rename-ilang-to-rtlil | whitequark | 2020-08-27 | 28 | -178/+206 |
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| | * | | | Replace "ILANG" with "RTLIL" everywhere. | whitequark | 2020-08-26 | 28 | -178/+206 |
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| * | | | dfflegalize: Fix decision tree for adffe. | Marcelina Kościelnicka | 2020-08-27 | 1 | -1/+5 |
| * | | | Bump version | Yosys Bot | 2020-08-27 | 1 | -1/+1 |
| * | | | intel_alm: Add multiply signedness to cells | Dan Ravensloft | 2020-08-26 | 7 | -16/+147 |
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| * | | Merge pull request #2355 from YosysHQ/verific_improvements | Miodrag Milanović | 2020-08-26 | 1 | -1/+223 |
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| | * | Add formal apps and template generators | Miodrag Milanovic | 2020-08-26 | 1 | -1/+223 |
| * | | Merge pull request #2351 from pbsds/proc_nomux | whitequark | 2020-08-26 | 1 | -1/+10 |
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| | * | proc: Add -nomux switch | Peder Bergebakken Sundt | 2020-08-20 | 1 | -1/+10 |
| * | | Bump version | Yosys Bot | 2020-08-23 | 1 | -1/+1 |
| * | | Merge pull request #2349 from nmoroze/smt2-bugfix | clairexen | 2020-08-22 | 1 | -9/+20 |
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| | * | | Ensure smt2 comments are associated with accessors | Noah Moroze | 2020-08-20 | 1 | -9/+20 |
| * | | | Bump version | Yosys Bot | 2020-08-21 | 1 | -1/+1 |
| * | | | synth_intel: Remove incomplete Arria 10 GX support. | Marcelina Kościelnicka | 2020-08-21 | 5 | -192/+4 |
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| * | | intel: move Cyclone V support to intel_alm | Dan Ravensloft | 2020-08-20 | 7 | -203/+11 |
| * | | Merge pull request #2347 from YosysHQ/mwk/techmap-shift-fixes | clairexen | 2020-08-20 | 3 | -81/+38 |
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| | * | | techmap/shift_shiftx: Remove the "shiftx2mux" special path. | Marcelina Kościelnicka | 2020-08-20 | 3 | -81/+38 |
| * | | | Merge pull request #2344 from YosysHQ/mwk/opt_share-fixes | clairexen | 2020-08-20 | 4 | -223/+192 |
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| | * | | | opt_share: Refactor, fix some bugs. | Marcelina Kościelnicka | 2020-08-17 | 4 | -223/+192 |
| * | | | | Merge pull request #2337 from YosysHQ/mwk/clean-keep-wire | clairexen | 2020-08-20 | 1 | -4/+9 |
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| | * | | | | opt_clean: Fix module keep rules. | Marcelina Kościelnicka | 2020-08-09 | 1 | -4/+9 |
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| * | | | | Merge pull request #2333 from YosysHQ/mwk/peepopt-shiftmul-signed | clairexen | 2020-08-20 | 2 | -5/+12 |
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| | * | | | | peeopt.shiftmul: Add a signedness check. | Marcelina Kościelnicka | 2020-08-05 | 2 | -5/+12 |
| * | | | | | Merge pull request #2328 from YosysHQ/mwk/opt_dff-cleanup | clairexen | 2020-08-20 | 11 | -1661/+129 |
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| | * | | | | | Remove now-redundant dff2dffe pass. | Marcelina Kościelnicka | 2020-08-07 | 2 | -415/+0 |
| | * | | | | | Remove now-redundant dff2dffs pass. | Marcelina Kościelnicka | 2020-08-07 | 3 | -216/+0 |
| | * | | | | | peepopt: Remove now-redundant dffmux pattern. | Marcelina Kościelnicka | 2020-08-07 | 5 | -318/+129 |
| | * | | | | | Remove now-redundant opt_rmdff pass. | Marcelina Kościelnicka | 2020-08-07 | 2 | -712/+0 |
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| * | | | | | Merge pull request #2327 from YosysHQ/mwk/techmap-constmap-fix | clairexen | 2020-08-20 | 2 | -1/+37 |
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| | * | | | | | techmap.CONSTMAP: Handle outputs before inputs. | Marcelina Kościelnicka | 2020-08-05 | 2 | -1/+37 |
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| * | | | | | Merge pull request #2326 from YosysHQ/mwk/peeopt-muldiv-sign | clairexen | 2020-08-20 | 2 | -1/+16 |
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| | * | | | | | peepopt.muldiv: Add a signedness check. | Marcelina Kościelnicka | 2020-08-04 | 2 | -1/+16 |
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| * | | | | | Merge pull request #2319 from YosysHQ/mwk/techmap-celltype-pattern | clairexen | 2020-08-20 | 3 | -8/+36 |
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| | * | | | | | techmap: Add support for [] wildcards in techmap_celltype. | Marcelina Kościelnicka | 2020-08-02 | 3 | -8/+36 |
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| * | | | / | Bump version | Yosys Bot | 2020-08-20 | 1 | -1/+1 |
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| * | | | | Merge pull request #2122 from PeterCrozier/struct_array2 | clairexen | 2020-08-19 | 2 | -29/+83 |
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| | * | | | include both power-of-two and non-power-of-two testcases | N. Engelhardt | 2020-08-18 | 1 | -6/+23 |
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