aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* unify cycles counting and cleanupMiodrag Milanovic2022-02-021-36/+35
|
* added stimulus mode and param checkMiodrag Milanovic2022-02-021-5/+31
|
* error when no signal foundMiodrag Milanovic2022-01-311-0/+2
|
* CleanupMiodrag Milanovic2022-01-311-1/+1
|
* Compare bits when not all are definedMiodrag Milanovic2022-01-311-3/+17
|
* CleanupMiodrag Milanovic2022-01-312-3/+2
|
* message updateMiodrag Milanovic2022-01-311-1/+1
|
* Display simulation time dataMiodrag Milanovic2022-01-313-2/+27
|
* Use edges when explicitMiodrag Milanovic2022-01-311-1/+5
|
* Updating initial state and checksMiodrag Milanovic2022-01-311-15/+28
|
* Fix scopeMiodrag Milanovic2022-01-311-1/+1
|
* check if stop before startMiodrag Milanovic2022-01-281-0/+3
|
* set initial state, only flip-flopsMiodrag Milanovic2022-01-281-1/+28
|
* ignore not found private signalsMiodrag Milanovic2022-01-282-2/+4
|
* preserve VCD mangled namesMiodrag Milanovic2022-01-281-1/+3
|
* detect edges even when xMiodrag Milanovic2022-01-281-2/+2
|
* recursive checkMiodrag Milanovic2022-01-281-26/+34
|
* cleanupMiodrag Milanovic2022-01-282-14/+1
|
* Do actual compareMiodrag Milanovic2022-01-283-77/+63
|
* Fix for limit_range_end when not writing vcdMiodrag Milanovic2022-01-281-0/+9
|
* Add more options and time handlingMiodrag Milanovic2022-01-283-2/+106
|
* update versionMiodrag Milanovic2022-01-261-1/+1
|
* Display values of outputsMiodrag Milanovic2022-01-261-12/+10
|
* Fix tabs/spacesMiodrag Milanovic2022-01-261-31/+31
|
* Check if stimulatedMiodrag Milanovic2022-01-261-0/+14
|
* Read fst and use data to set inputsMiodrag Milanovic2022-01-261-10/+92
|
* Add fstdata helper classMiodrag Milanovic2022-01-263-1/+348
|
* Cleanup of config to support platformsMiodrag Milanovic2022-01-261-20/+13
|
* Add ability to write to FST fileMiodrag Milanovic2022-01-261-11/+109
|
* Add FST libraryMiodrag Milanovic2022-01-2510-0/+9857
|
* Bump versiongithub-actions[bot]2022-01-201-1/+1
|
* nexus: Fix BB sim modelgatecat2022-01-191-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Removed dbits 8 since 9 will always be pickedMiodrag Milanovic2022-01-191-2/+0
|
* Merge pull request #3120 from Icenowy/anlogic-bramMiodrag Milanović2022-01-198-2/+283
|\ | | | | anlogic: support BRAM mapping
| * anlogic: support BRAM mappingIcenowy Zheng2021-12-178-2/+283
| | | | | | | | | | | | | | | | | | | | | | Anlogic FPGAs all have two kinds of BRAMs, one is 9bit*1K when being true dual port (or 18bit*512 when simple dual port), the other is 16bit*2K. Supports mapping of these two kinds of BRAMs. 9Kbit BRAM in SDP mode and 32Kbit BRAM with 8bit width are not support yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
* | Bump versiongithub-actions[bot]2022-01-181-1/+1
| |
* | Merge pull request #3162 from YosysHQ/mmicko/windows_guidelinesMiodrag Milanović2022-01-171-0/+23
|\ \ | | | | | | Add info about VS build
| * | Update guidelines/WindowsMiodrag Milanović2022-01-171-1/+1
| | | | | | | | | Co-authored-by: N. Engelhardt <nakengelhardt@gmail.com>
| * | Add info about VS buildMiodrag Milanović2022-01-171-0/+23
| | |
* | | Merge pull request #3145 from nakengelhardt/advertise_suite_in_readmeN. Engelhardt2022-01-171-6/+17
|\ \ \ | |/ / |/| | mention tabby+oss cad suite in readme
| * | mention distributions' package managerN. Engelhardt2022-01-171-0/+1
| | |
| * | mention tabby+oss cad suite in readmeN. Engelhardt2022-01-041-6/+16
| | |
* | | Bump versiongithub-actions[bot]2022-01-121-1/+1
| | |
* | | Forgot oneMiodrag Milanovic2022-01-111-1/+1
| | |
* | | Change url to httpsMiodrag Milanovic2022-01-112-2/+2
| | |
* | | Next dev cycleMiodrag Milanovic2022-01-112-2/+5
| | |
* | | Release version 0.13Miodrag Milanovic2022-01-112-3/+3
| | |
* | | Update CHANGELOGMiodrag Milanovic2022-01-111-6/+19
| | |
* | | Bump versiongithub-actions[bot]2022-01-091-1/+1
| | |
* | | sv: auto add nosync to certain always_comb local varsZachary Snow2022-01-0710-0/+265
| | | | | | | | | | | | | | | If a local variable is always assigned before it is used, then adding nosync prevents latches from being needlessly generated.