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| | * | | | CleanupEddie Hung2019-07-121-10/+4
| | * | | | CleanupEddie Hung2019-07-121-15/+24
| | * | | | More cleanupEddie Hung2019-07-121-11/+10
| | * | | | CleanupEddie Hung2019-07-121-46/+16
| | * | | | CleanupEddie Hung2019-07-121-7/+1
| | * | | | CleanupEddie Hung2019-07-121-13/+109
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| * | | | Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fixEddie Hung2019-07-169-31/+122
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| | * | | | $__ICE40_CARRY_LUT4 -> $__ICE40_FULL_ADDER as per @whitequarkEddie Hung2019-07-157-8/+8
| | * | | | ice40_opt to $__ICE40_CARRY_LUT4 into $lut not SB_LUTEddie Hung2019-07-131-9/+7
| | * | | | Do not double count cells in abcEddie Hung2019-07-121-2/+2
| | * | | | Use Const::from_string() not its constructor...Eddie Hung2019-07-121-1/+1
| | * | | | Off by oneEddie Hung2019-07-121-1/+1
| | * | | | Fix spacingEddie Hung2019-07-121-1/+1
| | * | | | Remove double pushEddie Hung2019-07-121-1/+0
| | * | | | Map to and from this box if -abc9Eddie Hung2019-07-121-2/+3
| | * | | | ice40_opt to handle this box and opt back to SB_LUT4Eddie Hung2019-07-121-0/+48
| | * | | | Add new box to cells_sim.vEddie Hung2019-07-121-2/+25
| | * | | | _ABC macro will map and unmap to this new boxEddie Hung2019-07-122-0/+34
| | * | | | Combine SB_CARRY+SB_LUT into one $__ICE40_CARRY_LUT4 boxEddie Hung2019-07-123-25/+13
| * | | | | Merge pull request #1200 from mmicko/fix_typo_liberty_ccClifford Wolf2019-07-161-1/+1
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| | * | | | | Fix typo, double "of"Miodrag Milanovic2019-07-161-1/+1
| * | | | | | Merge pull request #1199 from mmicko/extract_fa_fixClifford Wolf2019-07-161-2/+2
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| | * | | | | Fix check logic in extract_faMiodrag Milanovic2019-07-161-2/+2
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| * | | | | Merge pull request #1196 from YosysHQ/eddie/fix1178Eddie Hung2019-07-151-5/+12
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| | * | | | | Revert "Add log_checkpoint function and use it in opt_muxtree"Eddie Hung2019-07-153-9/+0
| | * | | | | Revert "Fix first divergence in #1178"Eddie Hung2019-07-151-5/+1
| | * | | | | Merge branch 'master' into eddie/fix1178Eddie Hung2019-07-1526-93/+1204
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| | * | | | | | Redesign log_id_cache so that it doesn't keep IdString instances referenced, ...Clifford Wolf2019-07-151-6/+13
| | * | | | | | Add log_checkpoint function and use it in opt_muxtreeClifford Wolf2019-07-153-0/+9
| | * | | | | | Fix first divergence in #1178Eddie Hung2019-07-091-1/+5
| * | | | | | | Merge pull request #1189 from YosysHQ/eddie/fix1151Clifford Wolf2019-07-151-0/+4
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| | * | | | | | | Error out if enable > dbitsEddie Hung2019-07-131-0/+4
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| * | | | | | | Merge pull request #1190 from YosysHQ/eddie/fix_1099Clifford Wolf2019-07-151-4/+8
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| | * | | | | | | If ConstEval fails do not log_abort() but return gracefullyEddie Hung2019-07-131-4/+8
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| * | | | | | | Merge pull request #1191 from whitequark/opt_lut-log_debugClifford Wolf2019-07-151-56/+38
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| | * | | | | | | opt_lut: make less chatty.whitequark2019-07-131-56/+38
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| * | | | | | | Merge pull request #1195 from Roman-Parise/masterClifford Wolf2019-07-151-1/+1
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| | * | | | | | | Updated FreeBSD dependencies in README.mdRoman-Parise2019-07-141-1/+1
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| * | | | | | | Merge pull request #1197 from nakengelhardt/handle-setrlimit-failClifford Wolf2019-07-151-1/+5
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| | * | | | | | smt: handle failure of setrlimit syscallN. Engelhardt2019-07-151-1/+5
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* | | | | | | ice40_dsp to accept $__MUL16X16 tooEddie Hung2019-07-181-1/+1
* | | | | | | synth_ice40 to decompose into 16x16Eddie Hung2019-07-181-1/+3
* | | | | | | mul2dsp to create cells that can be interchanged with $mulEddie Hung2019-07-181-1/+7
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* | | | | | Check if RHS is empty firstEddie Hung2019-07-181-0/+2
* | | | | | Make consistentEddie Hung2019-07-181-1/+2
* | | | | | Do not autoremove ffP aor muxPEddie Hung2019-07-181-2/+0
* | | | | | Improve pattern matcher to match subsets of $dffe? cellsEddie Hung2019-07-182-12/+22
* | | | | | Improve A/B reg packingEddie Hung2019-07-182-6/+11
* | | | | | Do not autoremove A/B registers since they might have other consumersEddie Hung2019-07-181-2/+0
* | | | | | Fix xilinx_dsp index castEddie Hung2019-07-181-2/+2