Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Add SVA NON_CONSECUTIVE_REPEAT and GOTO_REPEAT support | Clifford Wolf | 2018-03-06 | 1 | -20/+41 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add SVA first_match() support | Clifford Wolf | 2018-03-06 | 1 | -0/+16 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add SVA within support | Clifford Wolf | 2018-03-06 | 1 | -2/+18 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add support for SVA sequence intersect | Clifford Wolf | 2018-03-06 | 1 | -36/+251 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add get_fsm_accept_reject for parsing SVA properties | Clifford Wolf | 2018-03-06 | 1 | -73/+86 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Simplified SVA "until" handling | Clifford Wolf | 2018-03-06 | 1 | -25/+16 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Imporove yosys-smtbmc error handling, Improve VCD output | Clifford Wolf | 2018-03-05 | 2 | -23/+49 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Fix connwrappers help message | Clifford Wolf | 2018-03-04 | 1 | -1/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Improve handling of warning messages | Clifford Wolf | 2018-03-04 | 3 | -12/+42 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Update copyright header | Clifford Wolf | 2018-03-04 | 1 | -1/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Improve SMT2 encoding of $reduce_{and,or,bool} | Clifford Wolf | 2018-03-04 | 1 | -1/+9 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Fix a hangup in yosys-smtbmc error handling | Clifford Wolf | 2018-03-04 | 1 | -3/+5 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add proper SVA seq.triggered support | Clifford Wolf | 2018-03-04 | 3 | -37/+102 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add "synth -noshare" | Clifford Wolf | 2018-03-04 | 1 | -2/+11 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add Verific SVA support for "seq and seq" expressions | Clifford Wolf | 2018-03-04 | 1 | -24/+94 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Refactor Verific SVA importer property parser | Clifford Wolf | 2018-03-04 | 1 | -56/+82 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add VerificClocking class and refactor Verific DFF handling | Clifford Wolf | 2018-03-04 | 3 | -126/+196 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Improved error handling in yosys-smtbmc | Clifford Wolf | 2018-03-03 | 1 | -1/+3 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add SVA support for sequence OR | Clifford Wolf | 2018-03-03 | 1 | -22/+33 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Terminate running SMT solver when smtbmc is terminated | Clifford Wolf | 2018-03-03 | 1 | -1/+31 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Fix smtbmc smtc/aiw parser for wire names containing [] | Clifford Wolf | 2018-03-03 | 1 | -1/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Fix handling of SVA "until seq.triggered" properties | Clifford Wolf | 2018-03-02 | 1 | -7/+25 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Update SVA cheat sheet in verificsva.cc | Clifford Wolf | 2018-03-02 | 1 | -2/+4 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Fix in Verific SVA importer handling of until_with | Clifford Wolf | 2018-03-01 | 1 | -7/+5 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Mangle names with square brackets in VCD files to work around issues in gtkwave | Clifford Wolf | 2018-03-01 | 1 | -2/+8 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Fixes and improvements in Verific SVA importer | Clifford Wolf | 2018-03-01 | 3 | -83/+136 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add $rose/$fell support to Verific bindings | Clifford Wolf | 2018-03-01 | 1 | -3/+22 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Merge branch 'verificsva-ng' | Clifford Wolf | 2018-02-28 | 4 | -403/+752 |
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| * | Add support for PRIM_SVA_UNTIL to new SVA importer | Clifford Wolf | 2018-02-28 | 1 | -0/+27 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add DFSM generator to verific SVA importer | Clifford Wolf | 2018-02-28 | 1 | -19/+272 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Continue refactoring of Verific SVA importer code | Clifford Wolf | 2018-02-28 | 3 | -671/+172 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Major redesign of Verific SVA importer | Clifford Wolf | 2018-02-27 | 2 | -6/+574 |
|/ | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add -lz for verific builds | Clifford Wolf | 2018-02-27 | 1 | -1/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add handling of verific OPER_REDUCE_NOR | Clifford Wolf | 2018-02-26 | 1 | -0/+6 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add handling of verific OPER_SELECTOR and OPER_WIDE_SELECTOR | Clifford Wolf | 2018-02-26 | 1 | -0/+13 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add handling of verific OPER_NTO1MUX and OPER_WIDE_NTO1MUX | Clifford Wolf | 2018-02-26 | 1 | -0/+25 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add "SVA syntax cheat sheet" comment to verificsva.cc | Clifford Wolf | 2018-02-26 | 1 | -0/+34 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add $dlatchsr support to clk2fflogic | Clifford Wolf | 2018-02-26 | 1 | -4/+25 |
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* | Small fixes and improvements in $allconst/$allseq handling | Clifford Wolf | 2018-02-26 | 2 | -16/+23 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Fix opt_rmdff handling of $dlatchsr | Clifford Wolf | 2018-02-26 | 1 | -0/+3 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Merge branch 'forall' | Clifford Wolf | 2018-02-23 | 17 | -98/+424 |
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| * | Add smtbmc support for exist-forall problems | Clifford Wolf | 2018-02-23 | 6 | -89/+357 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add $allconst and $allseq cell types | Clifford Wolf | 2018-02-23 | 11 | -9/+67 |
|/ | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add Verific SVA support for ranges in repetition operator | Clifford Wolf | 2018-02-22 | 1 | -5/+26 |
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* | Add support for SVA throughout via Verific | Clifford Wolf | 2018-02-21 | 2 | -3/+7 |
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* | Add support for mockup clock signals in yosys-smtbmc vcd output | Clifford Wolf | 2018-02-20 | 3 | -6/+111 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Merge pull request #507 from cr1901/msys2 | Clifford Wolf | 2018-02-19 | 1 | -3/+3 |
|\ | | | | | Improve msys2 flags for building abc. | ||||
| * | Improve msys2 flags for building abc. | William D. Jones | 2018-02-19 | 1 | -3/+3 |
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* | Add support for SVA sequence concatenation ranges via verific | Clifford Wolf | 2018-02-18 | 3 | -16/+144 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add support for SVA until statements via Verific | Clifford Wolf | 2018-02-18 | 3 | -34/+138 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> |