1 files changed, 0 insertions, 50 deletions
diff --git a/tests/efinix/adffs.ys b/tests/efinix/adffs.ys
deleted file mode 100644
index 1069c6c5c..000000000
--- a/tests/efinix/adffs.ys
+++ /dev/null
@@ -1,50 +0,0 @@
-read_verilog adffs.v
-design -save read
-
-hierarchy -top adff
-proc
-equiv_opt -async2sync -assert -map +/efinix/cells_sim.v synth_efinix # equivalency check
-design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
-cd adff # Constrain all select calls below inside the top module
-select -assert-count 1 t:EFX_FF
-select -assert-count 1 t:EFX_GBUFCE
-
-select -assert-none t:EFX_FF t:EFX_GBUFCE %% t:* %D
-
-
-design -load read
-hierarchy -top adffn
-proc
-equiv_opt -async2sync -assert -map +/efinix/cells_sim.v synth_efinix # equivalency check
-design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
-cd adffn # Constrain all select calls below inside the top module
-select -assert-count 1 t:EFX_FF
-select -assert-count 1 t:EFX_GBUFCE
-
-select -assert-none t:EFX_FF t:EFX_GBUFCE %% t:* %D
-
-
-design -load read
-hierarchy -top dffs
-proc
-equiv_opt -async2sync -assert -map +/efinix/cells_sim.v synth_efinix # equivalency check
-design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
-cd dffs # Constrain all select calls below inside the top module
-select -assert-count 1 t:EFX_FF
-select -assert-count 1 t:EFX_GBUFCE
-select -assert-count 1 t:EFX_LUT4
-
-select -assert-none t:EFX_FF t:EFX_GBUFCE t:EFX_LUT4 %% t:* %D
-
-
-design -load read
-hierarchy -top ndffnr
-proc
-equiv_opt -async2sync -assert -map +/efinix/cells_sim.v synth_efinix # equivalency check
-design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
-cd ndffnr # Constrain all select calls below inside the top module
-select -assert-count 1 t:EFX_FF
-select -assert-count 1 t:EFX_GBUFCE
-select -assert-count 1 t:EFX_LUT4
-
-select -assert-none t:EFX_FF t:EFX_GBUFCE t:EFX_LUT4 %% t:* %D