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-rw-r--r--techlibs/ecp5/arith_map.v9
-rw-r--r--techlibs/ice40/ice40_unlut.cc2
2 files changed, 6 insertions, 5 deletions
diff --git a/techlibs/ecp5/arith_map.v b/techlibs/ecp5/arith_map.v
index eb7947601..17bde0497 100644
--- a/techlibs/ecp5/arith_map.v
+++ b/techlibs/ecp5/arith_map.v
@@ -50,20 +50,21 @@ module _80_ecp5_alu (A, B, CI, BI, X, Y, CO);
wire [Y_WIDTH2-1:0] AA = A_buf;
wire [Y_WIDTH2-1:0] BB = BI ? ~B_buf : B_buf;
+ wire [Y_WIDTH2-1:0] BX = B_buf;
wire [Y_WIDTH2-1:0] C = {CO, CI};
wire [Y_WIDTH2-1:0] FCO, Y1;
genvar i;
generate for (i = 0; i < Y_WIDTH2; i = i + 2) begin:slice
CCU2C #(
- .INIT0(16'b0110011010101010),
- .INIT1(16'b0110011010101010),
+ .INIT0(16'b1001011010101010),
+ .INIT1(16'b1001011010101010),
.INJECT1_0("NO"),
.INJECT1_1("NO")
) ccu2c_i (
.CIN(C[i]),
- .A0(AA[i]), .B0(BB[i]), .C0(1'b0), .D0(1'b1),
- .A1(AA[i+1]), .B1(BB[i+1]), .C1(1'b0), .D1(1'b1),
+ .A0(AA[i]), .B0(BX[i]), .C0(BI), .D0(1'b1),
+ .A1(AA[i+1]), .B1(BX[i+1]), .C1(BI), .D1(1'b1),
.S0(Y[i]), .S1(Y1[i]),
.COUT(FCO[i])
);
diff --git a/techlibs/ice40/ice40_unlut.cc b/techlibs/ice40/ice40_unlut.cc
index 2428a8e78..d16e6e6a3 100644
--- a/techlibs/ice40/ice40_unlut.cc
+++ b/techlibs/ice40/ice40_unlut.cc
@@ -74,7 +74,7 @@ static void run_ice40_unlut(Module *module)
}
struct Ice40UnlutPass : public Pass {
- Ice40UnlutPass() : Pass("ice40_unlut", "iCE40: perform simple optimizations") { }
+ Ice40UnlutPass() : Pass("ice40_unlut", "iCE40: transform SB_LUT4 cells to $lut cells") { }
void help() YS_OVERRIDE
{
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