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-rw-r--r--techlibs/ice40/synth_ice40.cc21
1 files changed, 11 insertions, 10 deletions
diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc
index d92e40726..f9c5a750b 100644
--- a/techlibs/ice40/synth_ice40.cc
+++ b/techlibs/ice40/synth_ice40.cc
@@ -236,16 +236,16 @@ struct SynthIce40Pass : public ScriptPass
void script() YS_OVERRIDE
{
+ std::string define;
+ if (device_opt == "lp")
+ define = "-D ICE40_LP";
+ else if (device_opt == "u")
+ define = "-D ICE40_U";
+ else
+ define = "-D ICE40_HX";
if (check_label("begin"))
{
- std::string define;
- if (device_opt == "lp")
- define = "-D ICE40_LP";
- else if (device_opt == "u")
- define = "-D ICE40_U";
- else
- define = "-D ICE40_HX";
- run("read_verilog " + define + " -lib +/ice40/cells_sim.v");
+ run("read_verilog " + define + " -lib -specify +/ice40/cells_sim.v");
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
run("proc");
}
@@ -316,6 +316,7 @@ struct SynthIce40Pass : public ScriptPass
run("ice40_wrapcarry");
run("techmap -map +/techmap.v -map +/ice40/arith_map.v");
}
+ run("opt -fast");
if (retime || help_mode)
run("abc -dff -D 1", "(only if -retime)");
run("ice40_opt");
@@ -351,7 +352,7 @@ struct SynthIce40Pass : public ScriptPass
}
if (!noabc) {
if (abc9) {
- run("read_verilog -icells -lib +/ice40/abc9_model.v");
+ run("read_verilog " + define + " -icells -lib -specify +/abc9_model.v +/ice40/abc9_model.v");
int wire_delay;
if (device_opt == "lp")
wire_delay = 400;
@@ -359,7 +360,7 @@ struct SynthIce40Pass : public ScriptPass
wire_delay = 750;
else
wire_delay = 250;
- run(stringf("abc9 -W %d -lut +/ice40/abc9_%s.lut -box +/ice40/abc9_%s.box", wire_delay, device_opt.c_str(), device_opt.c_str()));
+ run(stringf("abc9 -W %d", wire_delay));
}
else
run("abc -dress -lut 4", "(skip if -noabc)");