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-rw-r--r--techlibs/common/simlib.v16
1 files changed, 16 insertions, 0 deletions
diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v
index 342555024..ea36e2922 100644
--- a/techlibs/common/simlib.v
+++ b/techlibs/common/simlib.v
@@ -1305,6 +1305,22 @@ endmodule
// --------------------------------------------------------
+module \$expect (A, EN);
+
+input A, EN;
+
+`ifndef SIMLIB_NOCHECKS
+always @* begin
+ if (A === 1'b1 && EN === 1'b1) begin
+ $display("Expectation %m passed.");
+ end
+end
+`endif
+
+endmodule
+
+// --------------------------------------------------------
+
module \$equiv (A, B, Y);
input A, B;