diff options
Diffstat (limited to 'passes')
-rw-r--r-- | passes/proc/proc.cc | 20 | ||||
-rw-r--r-- | passes/proc/proc_arst.cc | 25 | ||||
-rw-r--r-- | passes/proc/proc_clean.cc | 16 | ||||
-rw-r--r-- | passes/proc/proc_dff.cc | 24 | ||||
-rw-r--r-- | passes/proc/proc_mux.cc | 18 | ||||
-rw-r--r-- | passes/proc/proc_rmdead.cc | 34 |
6 files changed, 110 insertions, 27 deletions
diff --git a/passes/proc/proc.cc b/passes/proc/proc.cc index c0f502c83..05f166759 100644 --- a/passes/proc/proc.cc +++ b/passes/proc/proc.cc @@ -23,7 +23,25 @@ #include <stdio.h> struct ProcPass : public Pass { - ProcPass() : Pass("proc") { } + ProcPass() : Pass("proc", "translate processes to netlists") { } + virtual void help() + { + // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| + log("\n"); + log(" proc [selection]\n"); + log("\n"); + log("This pass calls all the other proc_* passes in the most common order.\n"); + log("\n"); + log(" proc_clean\n"); + log(" proc_rmdead\n"); + log(" proc_arst\n"); + log(" proc_mux\n"); + log(" proc_dff\n"); + log(" proc_clean\n"); + log("\n"); + log("This replaces the processes in the design with multiplexers and flip-flops.\n"); + log("\n"); + } virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { log_header("Executing PROC pass (convert processes to netlists).\n"); diff --git a/passes/proc/proc_arst.cc b/passes/proc/proc_arst.cc index 8e57d0efc..62dfebaec 100644 --- a/passes/proc/proc_arst.cc +++ b/passes/proc/proc_arst.cc @@ -174,18 +174,31 @@ static void proc_arst(RTLIL::Module *mod, RTLIL::Process *proc, SigMap &assign_m } struct ProcArstPass : public Pass { - ProcArstPass() : Pass("proc_arst") { } + ProcArstPass() : Pass("proc_arst", "detect asynchronous resets") { } + virtual void help() + { + // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| + log("\n"); + log(" proc_arst [selection]\n"); + log("\n"); + log("This pass identifies asynchronous resets in the processes and converts them\n"); + log("to a different internal representation that is suitable for generating\n"); + log("flip-flop cells with asynchronous resets.\n"); + log("\n"); + } virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { log_header("Executing PROC_ARST pass (detect async resets in processes).\n"); extra_args(args, 1, design); - for (auto &mod_it : design->modules) { - SigMap assign_map(mod_it.second); - for (auto &proc_it : mod_it.second->processes) - proc_arst(mod_it.second, proc_it.second, assign_map); - } + for (auto &mod_it : design->modules) + if (design->selected(mod_it.second)) { + SigMap assign_map(mod_it.second); + for (auto &proc_it : mod_it.second->processes) + if (design->selected(mod_it.second, proc_it.second)) + proc_arst(mod_it.second, proc_it.second, assign_map); + } } } ProcArstPass; diff --git a/passes/proc/proc_clean.cc b/passes/proc/proc_clean.cc index ec9fade30..e247f2882 100644 --- a/passes/proc/proc_clean.cc +++ b/passes/proc/proc_clean.cc @@ -130,7 +130,17 @@ static void proc_clean(RTLIL::Module *mod, RTLIL::Process *proc, int &total_coun } struct ProcCleanPass : public Pass { - ProcCleanPass() : Pass("proc_clean") { } + ProcCleanPass() : Pass("proc_clean", "remove empty parts of processes") { } + virtual void help() + { + // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| + log("\n"); + log(" proc_clean [selection]\n"); + log("\n"); + log("This pass removes empty parts of processes and ultimately removes a process\n"); + log("if it contains only empty structures.\n"); + log("\n"); + } virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { int total_count = 0; @@ -140,7 +150,11 @@ struct ProcCleanPass : public Pass { for (auto &mod_it : design->modules) { std::vector<std::string> delme; + if (!design->selected(mod_it.second)) + continue; for (auto &proc_it : mod_it.second->processes) { + if (!design->selected(mod_it.second, proc_it.second)) + continue; proc_clean(mod_it.second, proc_it.second, total_count); if (proc_it.second->syncs.size() == 0 && proc_it.second->root_case.switches.size() == 0 && proc_it.second->root_case.actions.size() == 0) { diff --git a/passes/proc/proc_dff.cc b/passes/proc/proc_dff.cc index ccacc72d2..93b90006c 100644 --- a/passes/proc/proc_dff.cc +++ b/passes/proc/proc_dff.cc @@ -161,18 +161,30 @@ static void proc_dff(RTLIL::Module *mod, RTLIL::Process *proc, ConstEval &ce) } struct ProcDffPass : public Pass { - ProcDffPass() : Pass("proc_dff") { } + ProcDffPass() : Pass("proc_dff", "extract flip-flops from processes") { } + virtual void help() + { + // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| + log("\n"); + log(" proc_dff [selection]\n"); + log("\n"); + log("This pass identifies flip-flops in the processes and converts then to\n"); + log("flip-flop cells.\n"); + log("\n"); + } virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { log_header("Executing PROC_DFF pass (convert process syncs to FFs).\n"); extra_args(args, 1, design); - for (auto &mod_it : design->modules) { - ConstEval ce(mod_it.second); - for (auto &proc_it : mod_it.second->processes) - proc_dff(mod_it.second, proc_it.second, ce); - } + for (auto &mod_it : design->modules) + if (design->selected(mod_it.second)) { + ConstEval ce(mod_it.second); + for (auto &proc_it : mod_it.second->processes) + if (design->selected(mod_it.second, proc_it.second)) + proc_dff(mod_it.second, proc_it.second, ce); + } } } ProcDffPass; diff --git a/passes/proc/proc_mux.cc b/passes/proc/proc_mux.cc index 4d50597d1..75ca4727f 100644 --- a/passes/proc/proc_mux.cc +++ b/passes/proc/proc_mux.cc @@ -279,7 +279,17 @@ static void proc_mux(RTLIL::Module *mod, RTLIL::Process *proc) } struct ProcMuxPass : public Pass { - ProcMuxPass() : Pass("proc_mux") { } + ProcMuxPass() : Pass("proc_mux", "convert decision trees to multiplexers") { } + virtual void help() + { + // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| + log("\n"); + log(" proc_mux [selection]\n"); + log("\n"); + log("This pass converts the decision trees in processes (originating from if-else\n"); + log("and case statements) to trees of multiplexer cells.\n"); + log("\n"); + } virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { log_header("Executing PROC_MUX pass (convert decision trees to multiplexers).\n"); @@ -287,8 +297,10 @@ struct ProcMuxPass : public Pass { extra_args(args, 1, design); for (auto &mod_it : design->modules) - for (auto &proc_it : mod_it.second->processes) - proc_mux(mod_it.second, proc_it.second); + if (design->selected(mod_it.second)) + for (auto &proc_it : mod_it.second->processes) + if (design->selected(mod_it.second, proc_it.second)) + proc_mux(mod_it.second, proc_it.second); } } ProcMuxPass; diff --git a/passes/proc/proc_rmdead.cc b/passes/proc/proc_rmdead.cc index ca2070cad..d5fbef0d2 100644 --- a/passes/proc/proc_rmdead.cc +++ b/passes/proc/proc_rmdead.cc @@ -62,7 +62,16 @@ static void proc_rmdead(RTLIL::SwitchRule *sw, int &counter) } struct ProcRmdeadPass : public Pass { - ProcRmdeadPass() : Pass("proc_rmdead") { } + ProcRmdeadPass() : Pass("proc_rmdead", "eliminate dead trees in decision trees") { } + virtual void help() + { + // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| + log("\n"); + log(" proc_rmdead [selection]\n"); + log("\n"); + log("This pass identifies unreachable branches in decision trees and removes them.\n"); + log("\n"); + } virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { log_header("Executing PROC_RMDEAD pass (remove dead branches from decision trees).\n"); @@ -70,15 +79,20 @@ struct ProcRmdeadPass : public Pass { extra_args(args, 1, design); int total_counter = 0; - for (auto &mod_it : design->modules) - for (auto &proc_it : mod_it.second->processes) { - int counter = 0; - for (auto switch_it : proc_it.second->root_case.switches) - proc_rmdead(switch_it, counter); - if (counter > 0) - log("Removed %d dead cases from process %s in module %s.\n", counter, - proc_it.first.c_str(), mod_it.first.c_str()); - total_counter += counter; + for (auto &mod_it : design->modules) { + if (!design->selected(mod_it.second)) + continue; + for (auto &proc_it : mod_it.second->processes) { + if (!design->selected(mod_it.second, proc_it.second)) + continue; + int counter = 0; + for (auto switch_it : proc_it.second->root_case.switches) + proc_rmdead(switch_it, counter); + if (counter > 0) + log("Removed %d dead cases from process %s in module %s.\n", counter, + proc_it.first.c_str(), mod_it.first.c_str()); + total_counter += counter; + } } log("Removed a total of %d dead cases.\n", total_counter); |