aboutsummaryrefslogtreecommitdiffstats
path: root/passes/pmgen/xilinx_dsp_CREG.pmg
diff options
context:
space:
mode:
Diffstat (limited to 'passes/pmgen/xilinx_dsp_CREG.pmg')
-rw-r--r--passes/pmgen/xilinx_dsp_CREG.pmg4
1 files changed, 3 insertions, 1 deletions
diff --git a/passes/pmgen/xilinx_dsp_CREG.pmg b/passes/pmgen/xilinx_dsp_CREG.pmg
index 3f8486406..2408d483a 100644
--- a/passes/pmgen/xilinx_dsp_CREG.pmg
+++ b/passes/pmgen/xilinx_dsp_CREG.pmg
@@ -105,7 +105,9 @@ endcode
// #######################
// Subpattern for matching against input registers, based on knowledge of the
-// 'Q' input.
+// 'Q' input. Typically, this task would be handled by other Yosys passes
+// such as dff2dffe, but since DSP inference happens much before this, these
+// patterns have to be manually identified.
// At a high level:
// (1) Starting from a $dff cell that (partially or fully) drives the given
// 'Q' argument