diff options
Diffstat (limited to 'passes/memory')
| -rw-r--r-- | passes/memory/memory.cc | 2 | ||||
| -rw-r--r-- | passes/memory/memory_collect.cc | 4 |
2 files changed, 6 insertions, 0 deletions
diff --git a/passes/memory/memory.cc b/passes/memory/memory.cc index 712bc2537..cee63bdd8 100644 --- a/passes/memory/memory.cc +++ b/passes/memory/memory.cc @@ -35,6 +35,7 @@ struct MemoryPass : public Pass { log("\n"); log("This pass calls all the other memory_* passes in a useful order:\n"); log("\n"); + log(" opt_mem\n"); log(" memory_dff [-nordff] (-memx implies -nordff)\n"); log(" opt_clean\n"); log(" memory_share\n"); @@ -81,6 +82,7 @@ struct MemoryPass : public Pass { } extra_args(args, argidx, design); + Pass::call(design, "opt_mem"); Pass::call(design, flag_nordff ? "memory_dff -nordff" : "memory_dff"); Pass::call(design, "opt_clean"); Pass::call(design, "memory_share"); diff --git a/passes/memory/memory_collect.cc b/passes/memory/memory_collect.cc index 6acbce62f..9dcb3f024 100644 --- a/passes/memory/memory_collect.cc +++ b/passes/memory/memory_collect.cc @@ -218,6 +218,10 @@ Cell *handle_memory(Module *module, RTLIL::Memory *memory) mem->setPort("\\RD_DATA", sig_rd_data); mem->setPort("\\RD_EN", sig_rd_en); + // Copy attributes from RTLIL memory to $mem + for (auto attr : memory->attributes) + mem->attributes[attr.first] = attr.second; + for (auto c : memcells) module->remove(c); |