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-rw-r--r--CHANGELOG5
1 files changed, 5 insertions, 0 deletions
diff --git a/CHANGELOG b/CHANGELOG
index c29429295..0adf1e813 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -27,6 +27,7 @@ Yosys 0.9 .. Yosys 0.9-dev
- Improve attribute and parameter encoding in JSON to avoid ambiguities between
bit vectors and strings containing [01xz]*
- Added "clkbufmap" pass
+ - Added "extractinv" pass and "invertible_pin" attribute
- Added "synth_xilinx -family xc6s" for Spartan 6 support (experimental)
- Added "synth_xilinx -ise" (experimental)
- Added "synth_xilinx -iopad"
@@ -38,6 +39,10 @@ Yosys 0.9 .. Yosys 0.9-dev
- Improvements in pmgen: slices, choices, define, generate
- Added "xilinx_srl" for Xilinx shift register extraction
- Removed "shregmap -tech xilinx" (superseded by "xilinx_srl")
+ - Added "_TECHMAP_WIREINIT_*_" attribute and "_TECHMAP_REMOVEINIT_*_" wire for "techmap" pass
+ - Added "-match-init" option to "dff2dffs" pass
+ - Added "techmap_autopurge" support to techmap
+ - Added "add -mod <modname[s]>"
Yosys 0.8 .. Yosys 0.9
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