diff options
| -rw-r--r-- | techlibs/xilinx/.synth_xilinx.cc.swn | bin | 24576 -> 0 bytes | |||
| -rw-r--r-- | techlibs/xilinx/.synth_xilinx.cc.swo | bin | 20480 -> 0 bytes | |||
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 4 |
3 files changed, 2 insertions, 2 deletions
diff --git a/techlibs/xilinx/.synth_xilinx.cc.swn b/techlibs/xilinx/.synth_xilinx.cc.swn Binary files differdeleted file mode 100644 index a6564691a..000000000 --- a/techlibs/xilinx/.synth_xilinx.cc.swn +++ /dev/null diff --git a/techlibs/xilinx/.synth_xilinx.cc.swo b/techlibs/xilinx/.synth_xilinx.cc.swo Binary files differdeleted file mode 100644 index 6fc27ed3b..000000000 --- a/techlibs/xilinx/.synth_xilinx.cc.swo +++ /dev/null diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index ee8dec9ee..2676f5915 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -284,8 +284,6 @@ struct SynthXilinxPass : public Pass if (check_label(active, run_from, run_to, "map_cells")) { Pass::call(design, "techmap -map +/techmap.v -map +/xilinx/cells_map.v"); - Pass::call(design, "dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT -ff FDSE Q INIT " - "-ff FDRE_1 Q INIT -ff FDCE_1 Q INIT -ff FDPE_1 Q INIT -ff FDSE_1 Q INIT"); Pass::call(design, "clean"); } @@ -295,6 +293,8 @@ struct SynthXilinxPass : public Pass Pass::call(design, "abc -luts 2:2,3,6:5,10,20" + string(retime ? " -dff" : "")); Pass::call(design, "clean"); Pass::call(design, "techmap -map +/xilinx/lut_map.v -map +/xilinx/ff_map.v"); + Pass::call(design, "dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT -ff FDSE Q INIT " + "-ff FDRE_1 Q INIT -ff FDCE_1 Q INIT -ff FDPE_1 Q INIT -ff FDSE_1 Q INIT"); } if (check_label(active, run_from, run_to, "check")) |