diff options
| -rw-r--r-- | Makefile | 2 | ||||
| -rw-r--r-- | frontends/ast/ast.h | 2 | ||||
| -rw-r--r-- | frontends/ast/simplify.cc | 80 | ||||
| -rw-r--r-- | passes/techmap/insbuf.cc | 40 | ||||
| -rw-r--r-- | tests/svtypes/struct_array.sv | 131 |
5 files changed, 231 insertions, 24 deletions
@@ -142,7 +142,7 @@ LDLIBS += -lrt endif endif -YOSYS_VER := 0.23+38 +YOSYS_VER := 0.23+45 # Note: We arrange for .gitcommit to contain the (short) commit hash in # tarballs generated with git-archive(1) using .gitattributes. The git repo diff --git a/frontends/ast/ast.h b/frontends/ast/ast.h index 80497c131..142ec0801 100644 --- a/frontends/ast/ast.h +++ b/frontends/ast/ast.h @@ -203,7 +203,7 @@ namespace AST // if this is a multirange memory then this vector contains offset and length of each dimension std::vector<int> multirange_dimensions; - std::vector<bool> multirange_swapped; // true if range is swapped, not used for structs + std::vector<bool> multirange_swapped; // true if range is swapped // this is set by simplify and used during RTLIL generation AstNode *id2ast; diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc index c932e2c49..57237f4b3 100644 --- a/frontends/ast/simplify.cc +++ b/frontends/ast/simplify.cc @@ -273,9 +273,9 @@ static int range_width(AstNode *node, AstNode *rnode) return rnode->range_left - rnode->range_right + 1; } -[[noreturn]] static void struct_array_packing_error(AstNode *node) +[[noreturn]] static void struct_array_dimension_error(AstNode *node) { - log_file_error(node->filename, node->location.first_line, "Unpacked array in packed struct/union member %s\n", node->str.c_str()); + log_file_error(node->filename, node->location.first_line, "Currently limited to two dimensions in packed struct/union member %s\n", node->str.c_str()); } static void save_struct_array_width(AstNode *node, int width) @@ -285,10 +285,18 @@ static void save_struct_array_width(AstNode *node, int width) } +static void save_struct_range_swapped(AstNode *node, bool range_swapped) +{ + node->multirange_swapped.push_back(range_swapped); + +} + static int get_struct_array_width(AstNode *node) { + // This function is only useful for up to two array dimensions. + log_assert(node->multirange_dimensions.size() <= 2); // the stride for the array, 1 if not an array - return (node->multirange_dimensions.empty() ? 1 : node->multirange_dimensions.back()); + return (node->multirange_dimensions.size() != 2 ? 1 : node->multirange_dimensions[1]); } @@ -318,37 +326,47 @@ static int size_packed_struct(AstNode *snode, int base_offset) // member width e.g. bit [7:0] a width = range_width(node, node->children[0]); if (node->children.size() == 2) { + // Unpacked array. Note that this is a Yosys extension; only packed data types + // and integer data types are allowed in packed structs / unions in SystemVerilog. if (node->children[1]->type == AST_RANGE) { - // unpacked array e.g. bit [63:0] a [0:3] + // Unpacked array, e.g. bit [63:0] a [0:3] auto rnode = node->children[1]; - int array_count = range_width(node, rnode); - if (array_count == 1) { - // C-type array size e.g. bit [63:0] a [4] - array_count = rnode->range_left; - } + // C-style array size, e.g. bit [63:0] a [4] + bool c_type = rnode->children.size() == 1; + int array_count = c_type ? rnode->range_left : range_width(node, rnode); + save_struct_array_width(node, array_count); + save_struct_range_swapped(node, rnode->range_swapped || c_type); save_struct_array_width(node, width); + save_struct_range_swapped(node, node->children[0]->range_swapped); width *= array_count; } else { - // array element must be single bit for a packed array - struct_array_packing_error(node); + // Currently limited to at most two dimensions. + struct_array_dimension_error(node); } + } else { + // Vector. + save_struct_array_width(node, width); + save_struct_range_swapped(node, node->children[0]->range_swapped); } // range nodes are now redundant for (AstNode *child : node->children) delete child; node->children.clear(); } - else if (node->children.size() == 1 && node->children[0]->type == AST_MULTIRANGE) { + else if (node->children.size() > 0 && node->children[0]->type == AST_MULTIRANGE) { // packed 2D array, e.g. bit [3:0][63:0] a auto rnode = node->children[0]; - if (rnode->children.size() != 2) { - // packed arrays can only be 2D - struct_array_packing_error(node); + if (node->children.size() != 1 || rnode->children.size() != 2) { + // Currently limited to at most two dimensions. + struct_array_dimension_error(node); } int array_count = range_width(node, rnode->children[0]); + save_struct_array_width(node, array_count); + save_struct_range_swapped(node, rnode->children[0]->range_swapped); width = range_width(node, rnode->children[1]); save_struct_array_width(node, width); + save_struct_range_swapped(node, rnode->children[1]->range_swapped); width *= array_count; // range nodes are now redundant for (AstNode *child : node->children) @@ -428,8 +446,18 @@ static AstNode *offset_indexed_range(int offset, int stride, AstNode *left_expr, return new AstNode(AST_RANGE, left, right); } -static AstNode *make_struct_index_range(AstNode *node, AstNode *rnode, int stride, int offset) +static AstNode *make_struct_index_range(AstNode *node, AstNode *rnode, int stride, int offset, AstNode *member_node) { + // This function should be rewritten to support more than two array dimensions. + log_assert(member_node->multirange_dimensions.size() <= 2 && member_node->multirange_swapped.size() <= 2); + if (member_node->multirange_swapped[0]) { + // The struct item has swapped range; swap index into the struct accordingly. + int msb = member_node->multirange_dimensions[0] - 1; + for (auto &expr : rnode->children) { + expr = new AstNode(AST_SUB, node_int(msb), expr); + } + } + // generate a range node to perform either bit or array indexing if (rnode->children.size() == 1) { // index e.g. s.a[i] @@ -444,8 +472,18 @@ static AstNode *make_struct_index_range(AstNode *node, AstNode *rnode, int strid } } -static AstNode *slice_range(AstNode *rnode, AstNode *snode) +static AstNode *slice_range(AstNode *rnode, AstNode *snode, AstNode *member_node) { + // This function should be rewritten to support more than two array dimensions. + log_assert(member_node->multirange_dimensions.size() <= 2 && member_node->multirange_swapped.size() <= 2); + if (member_node->multirange_swapped[1]) { + // The second dimension has swapped range; swap index into the struct accordingly. + int msb = member_node->multirange_dimensions[1] - 1; + for (auto &expr : snode->children) { + expr = new AstNode(AST_SUB, node_int(msb), expr); + } + } + // apply the bit slice indicated by snode to the range rnode log_assert(rnode->type==AST_RANGE); auto left = rnode->children[0]; @@ -471,18 +509,20 @@ AstNode *AST::make_struct_member_range(AstNode *node, AstNode *member_node) // no range operations apply, return the whole width return make_range(range_left, range_right); } + // This function should be rewritten to support more than two array dimensions. + log_assert(member_node->multirange_dimensions.size() <= 2 && member_node->multirange_swapped.size() <= 2); int stride = get_struct_array_width(member_node); if (node->children.size() == 1 && node->children[0]->type == AST_RANGE) { // bit or array indexing e.g. s.a[2] or s.a[1:0] - return make_struct_index_range(node, node->children[0], stride, range_right); + return make_struct_index_range(node, node->children[0], stride, range_right, member_node); } else if (node->children.size() == 1 && node->children[0]->type == AST_MULTIRANGE) { // multirange, i.e. bit slice after array index, e.g. s.a[i][p:q] log_assert(stride > 1); auto mrnode = node->children[0]; - auto element_range = make_struct_index_range(node, mrnode->children[0], stride, range_right); + auto element_range = make_struct_index_range(node, mrnode->children[0], stride, range_right, member_node); // then apply bit slice range - auto range = slice_range(element_range, mrnode->children[1]); + auto range = slice_range(element_range, mrnode->children[1], member_node); delete element_range; return range; } diff --git a/passes/techmap/insbuf.cc b/passes/techmap/insbuf.cc index 68c22c317..f288987a1 100644 --- a/passes/techmap/insbuf.cc +++ b/passes/techmap/insbuf.cc @@ -36,12 +36,16 @@ struct InsbufPass : public Pass { log(" Use the given cell type instead of $_BUF_. (Notice that the next\n"); log(" call to \"clean\" will remove all $_BUF_ in the design.)\n"); log("\n"); + log(" -chain\n"); + log(" Chain buffer cells\n"); + log("\n"); } void execute(std::vector<std::string> args, RTLIL::Design *design) override { log_header(design, "Executing INSBUF pass (insert buffer cells for connected wires).\n"); IdString celltype = ID($_BUF_), in_portname = ID::A, out_portname = ID::Y; + bool chain_mode = false; size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) @@ -53,6 +57,10 @@ struct InsbufPass : public Pass { out_portname = RTLIL::escape_id(args[++argidx]); continue; } + if (arg == "-chain") { + chain_mode = true; + continue; + } break; } extra_args(args, argidx, design); @@ -60,6 +68,8 @@ struct InsbufPass : public Pass { for (auto module : design->selected_modules()) { std::vector<RTLIL::SigSig> new_connections; + pool<Cell*> bufcells; + SigMap sigmap; for (auto &conn : module->connections()) { @@ -70,22 +80,48 @@ struct InsbufPass : public Pass { SigBit lhs = conn.first[i]; SigBit rhs = conn.second[i]; - if (lhs.wire && !design->selected(module, lhs.wire)) { + if (!lhs.wire || !design->selected(module, lhs.wire)) { new_conn.first.append(lhs); new_conn.second.append(rhs); + log("Skip %s: %s -> %s\n", log_id(module), log_signal(rhs), log_signal(lhs)); continue; } + if (chain_mode && rhs.wire) { + rhs = sigmap(rhs); + SigBit outbit = sigmap(lhs); + sigmap.add(lhs, rhs); + sigmap.add(outbit); + } + Cell *cell = module->addCell(NEW_ID, celltype); cell->setPort(in_portname, rhs); cell->setPort(out_portname, lhs); - log("Added %s.%s: %s -> %s\n", log_id(module), log_id(cell), log_signal(rhs), log_signal(lhs)); + + log("Add %s/%s: %s -> %s\n", log_id(module), log_id(cell), log_signal(rhs), log_signal(lhs)); + bufcells.insert(cell); } if (GetSize(new_conn.first)) new_connections.push_back(new_conn); } + if (chain_mode) { + for (auto &cell : module->selected_cells()) { + if (bufcells.count(cell)) + continue; + for (auto &port : cell->connections()) + if (cell->input(port.first)) { + auto s = sigmap(port.second); + if (s == port.second) + continue; + log("Rewrite %s/%s/%s: %s -> %s\n", log_id(module), log_id(cell), + log_id(port.first), log_signal(port.second), log_signal(s)); + cell->setPort(port.first, s); + } + } + } + module->new_connections(new_connections); } } diff --git a/tests/svtypes/struct_array.sv b/tests/svtypes/struct_array.sv index 873f7befd..f69c4c577 100644 --- a/tests/svtypes/struct_array.sv +++ b/tests/svtypes/struct_array.sv @@ -39,4 +39,135 @@ module top; always_comb assert(s2==80'hFC00_4200_0012_3400_FFFC); + // Same as s2, but with little endian addressing + struct packed { + bit [0:7] [7:0] a; // 8 element packed array of bytes + bit [0:15] b; // filler for non-zero offset + } s3; + + initial begin + s3 = '0; + + s3.a[5:6] = 16'h1234; + s3.a[2] = 8'h42; + + s3.a[0] = '1; + s3.a[0][1:0] = '0; + + s3.b = '1; + s3.b[14:15] = '0; + end + + always_comb assert(s3==80'hFC00_4200_0012_3400_FFFC); + + // Same as s3, but with little endian bit addressing + struct packed { + bit [0:7] [0:7] a; // 8 element packed array of bytes + bit [0:15] b; // filler for non-zero offset + } s3_b; + + initial begin + s3_b = '0; + + s3_b.a[5:6] = 16'h1234; + s3_b.a[2] = 8'h42; + + s3_b.a[0] = '1; + s3_b.a[0][6:7] = '0; + + s3_b.b = '1; + s3_b.b[14:15] = '0; + end + + always_comb assert(s3_b==80'hFC00_4200_0012_3400_FFFC); + +`ifndef VERIFIC + // Note that the tests below for unpacked arrays in structs rely on the + // fact that they are actually packed in Yosys. + + // Same as s2, but using unpacked array syntax + struct packed { + bit [7:0] a [7:0]; // 8 element unpacked array of bytes + bit [15:0] b; // filler for non-zero offset + } s4; + + initial begin + s4 = '0; + + s4.a[2:1] = 16'h1234; + s4.a[5] = 8'h42; + + s4.a[7] = '1; + s4.a[7][1:0] = '0; + + s4.b = '1; + s4.b[1:0] = '0; + end + + always_comb assert(s4==80'hFC00_4200_0012_3400_FFFC); + + // Same as s3, but using unpacked array syntax + struct packed { + bit [7:0] a [0:7]; // 8 element unpacked array of bytes + bit [0:15] b; // filler for non-zero offset + } s5; + + initial begin + s5 = '0; + + s5.a[5:6] = 16'h1234; + s5.a[2] = 8'h42; + + s5.a[0] = '1; + s5.a[0][1:0] = '0; + + s5.b = '1; + s5.b[14:15] = '0; + end + + always_comb assert(s5==80'hFC00_4200_0012_3400_FFFC); + + // Same as s5, but with little endian bit addressing + struct packed { + bit [0:7] a [0:7]; // 8 element unpacked array of bytes + bit [0:15] b; // filler for non-zero offset + } s5_b; + + initial begin + s5_b = '0; + + s5_b.a[5:6] = 16'h1234; + s5_b.a[2] = 8'h42; + + s5_b.a[0] = '1; + s5_b.a[0][6:7] = '0; + + s5_b.b = '1; + s5_b.b[14:15] = '0; + end + + always_comb assert(s5_b==80'hFC00_4200_0012_3400_FFFC); + + // Same as s5, but using C-type unpacked array syntax + struct packed { + bit [7:0] a [8]; // 8 element unpacked array of bytes + bit [0:15] b; // filler for non-zero offset + } s6; + + initial begin + s6 = '0; + + s6.a[5:6] = 16'h1234; + s6.a[2] = 8'h42; + + s6.a[0] = '1; + s6.a[0][1:0] = '0; + + s6.b = '1; + s6.b[14:15] = '0; + end + + always_comb assert(s6==80'hFC00_4200_0012_3400_FFFC); +`endif + endmodule |