/* * yosys -- Yosys Open SYnthesis Suite * * Copyright (C) 2012 Clifford Wolf * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * --- * * The Verilog frontend. * * This frontend is using the AST frontend library (see frontends/ast/). * Thus this frontend does not generate RTLIL code directly but creates an * AST directly from the Verilog parse tree and then passes this AST to * the AST frontend library. * * --- * * This is the actual bison parser for Verilog code. The AST ist created directly * from the bison reduce functions here. Note that this code uses a few global * variables to hold the state of the AST generator and therefore this parser is * not reentrant. * */ %{ #include #include #include "frontends/verilog/verilog_frontend.h" #include "kernel/log.h" USING_YOSYS_NAMESPACE using namespace AST; using namespace VERILOG_FRONTEND; YOSYS_NAMESPACE_BEGIN namespace VERILOG_FRONTEND { int port_counter; std::map port_stubs; std::map attr_list, default_attr_list; std::map *albuf; std::vector ast_stack; struct AstNode *astbuf1, *astbuf2, *astbuf3; struct AstNode *current_function_or_task; struct AstNode *current_ast, *current_ast_mod; int current_function_or_task_port_id; std::vector case_type_stack; bool do_not_require_port_stubs; bool default_nettype_wire; bool sv_mode, formal_mode, lib_mode; std::istream *lexin; } YOSYS_NAMESPACE_END static void append_attr(AstNode *ast, std::map *al) { for (auto &it : *al) { if (ast->attributes.count(it.first) > 0) delete ast->attributes[it.first]; ast->attributes[it.first] = it.second; } delete al; } static void append_attr_clone(AstNode *ast, std::map *al) { for (auto &it : *al) { if (ast->attributes.count(it.first) > 0) delete ast->attributes[it.first]; ast->attributes[it.first] = it.second->clone(); } } static void free_attr(std::map *al) { for (auto &it : *al) delete it.second; delete al; } %} %name-prefix "frontend_verilog_yy" %union { std::string *string; struct YOSYS_NAMESPACE_PREFIX AST::AstNode *ast; std::map *al; bool boolean; } %token TOK_STRING TOK_ID TOK_CONST TOK_REALVAL TOK_PRIMITIVE %token ATTR_BEGIN ATTR_END DEFATTR_BEGIN DEFATTR_END %token TOK_MODULE TOK_ENDMODULE TOK_PARAMETER TOK_LOCALPARAM TOK_DEFPARAM %token TOK_PACKAGE TOK_ENDPACKAGE TOK_PACKAGESEP %token TOK_INPUT TOK_OUTPUT TOK_INOUT TOK_WIRE TOK_REG %token TOK_INTEGER TOK_SIGNED TOK_ASSIGN TOK_ALWAYS TOK_INITIAL %token TOK_BEGIN TOK_END TOK_IF TOK_ELSE TOK_FOR TOK_WHILE TOK_REPEAT %token TOK_DPI_FUNCTION TOK_POSEDGE TOK_NEGEDGE TOK_OR %token TOK_CASE TOK_CASEX TOK_CASEZ TOK_ENDCASE TOK_DEFAULT %token TOK_FUNCTION TOK_ENDFUNCTION TOK_TASK TOK_ENDTASK %token TOK_GENERATE TOK_ENDGENERATE TOK_GENVAR TOK_REAL %token TOK_SYNOPSYS_FULL_CASE TOK_SYNOPSYS_PARALLEL_CASE %token TOK_SUPPLY0 TOK_SUPPLY1 TOK_TO_SIGNED TOK_TO_UNSIGNED %token TOK_POS_INDEXED TOK_NEG_INDEXED TOK_ASSERT TOK_ASSUME %token TOK_PREDICT TOK_PROPERTY %type range range_or_multirange non_opt_range non_opt_multirange range_or_signed_int %type wire_type expr basic_expr concat_list rvalue lvalue lvalue_concat_list %type opt_label tok_prim_wrapper hierarchical_id %type opt_signed %type attr // operator precedence from low to high %left OP_LOR %left OP_LAND %left '|' OP_NOR %left '^' OP_XNOR %left '&' OP_NAND %left OP_EQ OP_NE OP_EQX OP_NEX %left '<' OP_LE OP_GE '>' %left OP_SHL OP_SHR OP_SSHL OP_SSHR %left '+' '-' %left '*' '/' '%' %left OP_POW %right UNARY_OPS %expect 2 %debug %% input: { ast_stack.clear(); ast_stack.push_back(current_ast); } design { ast_stack.pop_back(); log_assert(GetSize(ast_stack) == 0); for (auto &it : default_attr_list) delete it.second; default_attr_list.clear(); }; design: module design | defattr design | task_func_decl design | param_decl design | localparam_decl design | package design | /* empty */; attr: { for (auto &it : attr_list) delete it.second; attr_list.clear(); for (auto &it : default_attr_list) attr_list[it.first] = it.second->clone(); } attr_opt { std::map *al = new std::map; al->swap(attr_list); $$ = al; }; attr_opt: attr_opt ATTR_BEGIN opt_attr_list ATTR_END | /* empty */; defattr: DEFATTR_BEGIN { for (auto &it : default_attr_list) delete it.second; default_attr_list.clear(); for (auto &it : attr_list) delete it.second; attr_list.clear(); } opt_attr_list { default_attr_list = attr_list; attr_list.clear(); } DEFATTR_END; opt_attr_list: attr_list | /* empty */; attr_list: attr_assign | attr_list ',' attr_assign; attr_assign: hierarchical_id { if (attr_list.count(*$1) != 0) delete attr_list[*$1]; attr_list[*$1] = AstNode::mkconst_int(1, false); delete $1; } | hierarchical_id '=' expr { if (attr_list.count(*$1) != 0) delete attr_list[*$1]; attr_list[*$1] = $3; delete $1; }; hierarchical_id: TOK_ID { $$ = $1; } | hierarchical_id TOK_PACKAGESEP TOK_ID { if ($3->substr(0, 1) == "\\") *$1 += "::" + $3->substr(1); else *$1 += "::" + *$3; delete $3; $$ = $1; } | hierarchical_id '.' TOK_ID { if ($3->substr(0, 1) == "\\") *$1 += "." + $3->substr(1); else *$1 += "." + *$3; delete $3; $$ = $1; }; module: attr TOK_MODULE TOK_ID { do_not_require_port_stubs = false; AstNode *mod = new AstNode(AST_MODULE); ast_stack.back()->children.push_back(mod); ast_stack.push_back(mod); current_ast_mod = mod; port_stubs.clear(); port_counter = 0; mod->str = *$3; append_attr(mod, $1); delete $3; } module_para_opt module_args_opt ';' module_body TOK_ENDMODULE { if (port_stubs.size() != 0) frontend_verilog_yyerror("Missing details for module port `%s'.", port_stubs.begin()->first.c_str()); ast_stack.pop_back(); log_assert(ast_stack.size() == 1); current_ast_mod = NULL; }; module_para_opt: '#' '(' { astbuf1 = nullptr; } module_para_list { if (astbuf1) delete astbuf1; } ')' | /* empty */; module_para_list: single_module_para | module_para_list ',' single_module_para; single_module_para: /* empty */ | TOK_PARAMETER { if (astbuf1) delete astbuf1; astbuf1 = new AstNode(AST_PARAMETER); astbuf1->children.push_back(AstNode::mkconst_int(0, true)); } param_signed param_integer param_range single_param_decl | single_param_decl; module_args_opt: '(' ')' | /* empty */ | '(' module_args optional_comma ')'; module_args: module_arg | module_args ',' module_arg; optional_comma: ',' | /* empty */; module_arg_opt_assignment: '=' expr { if (ast_stack.back()->children.size() > 0 && ast_stack.back()->children.back()->type == AST_WIRE) { AstNode *wire = new AstNode(AST_IDENTIFIER); wire->str = ast_stack.back()->children.back()->str; if (ast_stack.back()->children.back()->is_reg) ast_stack.back()->children.push_back(new AstNode(AST_INITIAL, new AstNode(AST_BLOCK, new AstNode(AST_ASSIGN_LE, wire, $2)))); else ast_stack.back()->children.push_back(new AstNode(AST_ASSIGN, wire, $2)); } else frontend_verilog_yyerror("Syntax error."); } | /* empty */; module_arg: TOK_ID { if (ast_stack.back()->children.size() > 0 && ast_stack.back()->children.back()->type == AST_WIRE) { AstNode *node = ast_stack.back()->children.back()->clone(); node->str = *$1; node->port_id = ++port_counter; ast_stack.back()->children.push_back(node); } else { if (port_stubs.count(*$1) != 0) frontend_verilog_yyerror("Duplicate module port `%s'.", $1->c_str()); port_stubs[*$1] = ++port_counter; } delete $1; } module_arg_opt_assignment | attr wire_type range TOK_ID { AstNode *node = $2; node->str = *$4; node->port_id = ++port_counter; if ($3 != NULL) node->children.push_back($3); if (!node->is_input && !node->is_output) frontend_verilog_yyerror("Module port `%s' is neither input nor output.", $4->c_str()); if (node->is_reg && node->is_input && !node->is_output && !sv_mode) frontend_verilog_yyerror("Input port `%s' is declared as register.", $4->c_str()); ast_stack.back()->children.push_back(node); append_attr(node, $1); delete $4; } module_arg_opt_assignment | '.' '.' '.' { do_not_require_port_stubs = true; }; package: attr TOK_PACKAGE TOK_ID { AstNode *mod = new AstNode(AST_PACKAGE); ast_stack.back()->children.push_back(mod); ast_stack.push_back(mod); current_ast_mod = mod; mod->str = *$3; append_attr(mod, $1); } ';' package_body TOK_ENDPACKAGE { ast_stack.pop_back(); current_ast_mod = NULL; }; package_body: package_body package_body_stmt |; package_body_stmt: localparam_decl; non_opt_delay: '#' '(' expr ')' { delete $3; } | '#' '(' expr ':' expr ':' expr ')' { delete $3; delete $5; delete $7; }; delay: non_opt_delay | /* empty */; wire_type: { astbuf3 = new AstNode(AST_WIRE); } wire_type_token_list delay { $$ = astbuf3; }; wire_type_token_list: wire_type_token | wire_type_token_list wire_type_token; wire_type_token: TOK_INPUT { astbuf3->is_input = true; } | TOK_OUTPUT { astbuf3->is_output = true; } | TOK_INOUT { astbuf3->is_input = true; astbuf3->is_output = true; } | TOK_WIRE { } | TOK_REG { astbuf3->is_reg = true; } | TOK_INTEGER { astbuf3->is_reg = true; astbuf3->range_left = 31; astbuf3->range_right = 0; astbuf3->is_signed = true; } | TOK_GENVAR { astbuf3->type = AST_GENVAR; astbuf3->is_reg = true; astbuf3->range_left = 31; astbuf3->range_right = 0; } | TOK_SIGNED { astbuf3->is_signed = true; }; non_opt_range: '[' expr ':' expr ']' { $$ = new AstNode(AST_RANGE); $$->children.push_back($2); $$->children.push_back($4); } | '[' expr TOK_POS_INDEXED expr ']' { $$ = new AstNode(AST_RANGE); $$->children.push_back(new AstNode(AST_SUB, new AstNode(AST_ADD, $2->clone(), $4), AstNode::mkconst_int(1, true))); $$->children.push_back(new AstNode(AST_ADD, $2, AstNode::mkconst_int(0, true))); } | '[' expr TOK_NEG_INDEXED expr ']' { $$ = new AstNode(AST_RA
/*
    tests/test_custom-exceptions.cpp -- exception translation

    Copyright (c) 2016 Pim Schellart <P.Schellart@princeton.edu>

    All rights reserved. Use of this source code is governed by a
    BSD-style license that can be found in the LICENSE file.
*/

#include "pybind11_tests.h"

// A type that should be raised as an exception in Python
class MyException : public std::exception {
public:
    explicit MyException(const char * m) : message{m} {}
    const char * what() const noexcept override {return message.c_str();}
private:
    std::string message = "";
};

// A type that should be translated to a standard Python exception
class MyException2 : public std::exception {
public:
    explicit MyException2(const char * m) : message{m} {}
    const char * what() const noexcept override {return message.c_str();}
private:
    std::string message = "";
};

// A type that is not derived from std::exception (and is thus unknown)
class MyException3 {
public:
    explicit MyException3(const char * m) : message{m} {}
    virtual const char * what() const noexcept {return message.c_str();}
    // Rule of 5 BEGIN: to preempt compiler warnings.
    MyException3(const MyException3&) = default;
    MyException3(MyException3&&) = default;
    MyException3& operator=(const MyException3&) = default;
    MyException3& operator=(MyException3&&) = default;
    virtual ~MyException3() = default;
    // Rule of 5 END.
private:
    std::string message = "";
};

// A type that should be translated to MyException
// and delegated to its exception translator
class MyException4 : public std::exception {
public:
    explicit MyException4(const char * m) : message{m} {}
    const char * what() const noexcept override {return message.c_str();}
private:
    std::string message = "";
};


// Like the above, but declared via the helper function
class MyException5 : public std::logic_error {
public:
    explicit MyException5(const std::string &what) : std::logic_error(what) {}
};

// Inherits from MyException5
class MyException5_1 : public MyException5 {
    using MyException5::MyException5;
};

struct PythonCallInDestructor {
    PythonCallInDestructor(const py::dict &d) : d(d) {}
    ~PythonCallInDestructor() { d["good"] = true; }

    py::dict d;
};



struct PythonAlreadySetInDestructor {
    PythonAlreadySetInDestructor(const py::str &s) : s(s) {}
    ~PythonAlreadySetInDestructor() {
        py::dict foo;
        try {
            // Assign to a py::object to force read access of nonexistent dict entry
            py::object o = foo["bar"];
        }
        catch (py::error_already_set& ex) {
            ex.discard_as_unraisable(s);
        }
    }

    py::str s;
};


TEST_SUBMODULE(exceptions, m) {
    m.def("throw_std_exception", []() {
        throw std::runtime_error("This exception was intentionally thrown.");
    });

    // make a new custom exception and use it as a translation target
    static py::exception<MyException> ex(m, "MyException");
    py::register_exception_translator([](std::exception_ptr p) {
        try {
            if (p) std::rethrow_exception(p);
        } catch (const MyException &e) {
            // Set MyException as the active python error
            ex(e.what());
        }
    });

    // register new translator for MyException2
    // no need to store anything here because this type will
    // never by visible from Python
    py::register_exception_translator([](std::exception_ptr p) {
        try {
            if (p) std::rethrow_exception(p);
        } catch (const MyException2 &e) {
            // Translate this exception to a standard RuntimeError
            PyErr_SetString(PyExc_RuntimeError, e.what());
        }
    });

    // register new translator for MyException4
    // which will catch it and delegate to the previously registered
    // translator for MyException by throwing a new exception
    py::register_exception_translator([](std::exception_ptr p) {
        try {
            if (p) std::rethrow_exception(p);
        } catch (const MyException4 &e) {
            throw MyException(e.what());
        }
    });

    // A simple exception translation:
    auto ex5 = py::register_exception<MyException5>(m, "MyException5");
    // A slightly more complicated one that declares MyException5_1 as a subclass of MyException5
    py::register_exception<MyException5_1>(m, "MyException5_1", ex5.ptr());

    m.def("throws1", []() { throw MyException("this error should go to a custom type"); });
    m.def("throws2", []() { throw MyException2("this error should go to a standard Python exception"); });
    m.def("throws3", []() { throw MyException3("this error cannot be translated"); });
    m.def("throws4", []() { throw MyException4("this error is rethrown"); });
    m.def("throws5", []() { throw MyException5("this is a helper-defined translated exception"); });
    m.def("throws5_1", []() { throw MyException5_1("MyException5 subclass"); });
    m.def("throws_logic_error", []() { throw std::logic_error("this error should fall through to the standard handler"); });
    m.def("throws_overflow_error", []() {throw std::overflow_error(""); });
    m.def("exception_matches", []() {
        py::dict foo;
        try {
            // Assign to a py::object to force read access of nonexistent dict entry
            py::object o = foo["bar"];
        }
        catch (py::error_already_set& ex) {
            if (!ex.matches(PyExc_KeyError)) throw;
            return true;
        }
        return false;
    });
    m.def("exception_matches_base", []() {
        py::dict foo;
        try {
            // Assign to a py::object to force read access of nonexistent dict entry
            py::object o = foo["bar"];
        }
        catch (py::error_already_set &ex) {
            if (!ex.matches(PyExc_Exception)) throw;
            return true;
        }
        return false;
    });
    m.def("modulenotfound_exception_matches_base", []() {
        try {
            // On Python >= 3.6, this raises a ModuleNotFoundError, a subclass of ImportError
            py::module_::import("nonexistent");
        }
        catch (py::error_already_set &ex) {
            if (!ex.matches(PyExc_ImportError)) throw;
            return true;
        }
        return false;
    });

    m.def("throw_already_set", [](bool err) {
        if (err)
            PyErr_SetString(PyExc_ValueError, "foo");
        try {
            throw py::error_already_set();
        } catch (const std::runtime_error& e) {
            if ((err && e.what() != std::string("ValueError: foo")) ||
                (!err && e.what() != std::string("Unknown internal error occurred")))
            {
                PyErr_Clear();
                throw std::runtime_error("error message mismatch");
            }
        }
        PyErr_Clear();
        if (err)
            PyErr_SetString(PyExc_ValueError, "foo");
        throw py::error_already_set();
    });

    m.def("python_call_in_destructor", [](py::dict d) {
        try {
            PythonCallInDestructor set_dict_in_destructor(d);
            PyErr_SetString(PyExc_ValueError, "foo");
            throw py::error_already_set();
        } catch (const py::error_already_set&) {
            return true;
        }
        return false;
    });

    m.def("python_alreadyset_in_destructor", [](py::str s) {
        PythonAlreadySetInDestructor alreadyset_in_destructor(s);
        return true;
    });

    // test_nested_throws
    m.def("try_catch", [m](py::object exc_type, py::function f, py::args args) {
        try { f(*args); }
        catch (py::error_already_set &ex) {
            if (ex.matches(exc_type))
                py::print(ex.what());
            else
                throw;
        }
    });

    // Test repr that cannot be displayed
    m.def("simple_bool_passthrough", [](bool x) {return x;});

}