From d290766101a62d575c3e6aacbecde46ecab349f6 Mon Sep 17 00:00:00 2001 From: gatecat Date: Sat, 10 Jul 2021 23:23:19 +0100 Subject: ice40: Fix order of values in error Signed-off-by: gatecat --- ice40/pack.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ice40') diff --git a/ice40/pack.cc b/ice40/pack.cc index b9857fbd..67c3dbb7 100644 --- a/ice40/pack.cc +++ b/ice40/pack.cc @@ -1090,7 +1090,7 @@ void set_period(Context *ctx, CellInfo *ci, IdString port, delay_t period) if (!equals_epsilon(to->clkconstr->period.maxDelay(), period)) log_warning(" Overriding derived constraint of %.1f MHz on net %s with user-specified constraint of " "%.1f MHz.\n", - MHz(ctx, to->clkconstr->period.maxDelay()), to->name.c_str(ctx), MHz(ctx, period)); + MHz(ctx, period), to->name.c_str(ctx), MHz(ctx, to->clkconstr->period.maxDelay())); return; } to->clkconstr = std::unique_ptr(new ClockConstraint()); -- cgit v1.2.3