From 493d6c3fb93fb7ffe96609ded9e392b327b2c86c Mon Sep 17 00:00:00 2001 From: David Shah Date: Fri, 14 Dec 2018 12:16:29 +0000 Subject: Add Python helper functions for floorplanning Signed-off-by: David Shah --- ice40/arch_pybindings.cc | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'ice40') diff --git a/ice40/arch_pybindings.cc b/ice40/arch_pybindings.cc index f0ca584b..bc0bfb84 100644 --- a/ice40/arch_pybindings.cc +++ b/ice40/arch_pybindings.cc @@ -144,6 +144,13 @@ void arch_wrap_python() fn_wrapper_2a_v, pass_through>::def_wrap(ctx_cls, "addClock"); + fn_wrapper_5a_v, pass_through, pass_through, pass_through, + pass_through>::def_wrap(ctx_cls, "createRectangularRegion"); + fn_wrapper_2a_v, + conv_from_str>::def_wrap(ctx_cls, "addBelToRegion"); + fn_wrapper_2a_v, conv_from_str>::def_wrap(ctx_cls, "constrainCellToRegion"); WRAP_RANGE(Bel, conv_to_str); WRAP_RANGE(Wire, conv_to_str); -- cgit v1.2.3 From 1780f42b9a7854a8a7bf1f2d6589d3d35f133f87 Mon Sep 17 00:00:00 2001 From: David Shah Date: Fri, 14 Dec 2018 13:41:28 +0000 Subject: ice40: Add examples folder including floorplan example Signed-off-by: David Shah --- ice40/blinky.pcf | 6 ------ ice40/blinky.proj | 15 --------------- ice40/blinky.sh | 8 -------- ice40/blinky.v | 27 --------------------------- ice40/blinky.ys | 3 --- ice40/blinky_tb.v | 25 ------------------------- ice40/examples/blinky/blinky.pcf | 6 ++++++ ice40/examples/blinky/blinky.proj | 15 +++++++++++++++ ice40/examples/blinky/blinky.sh | 8 ++++++++ ice40/examples/blinky/blinky.v | 27 +++++++++++++++++++++++++++ ice40/examples/blinky/blinky.ys | 3 +++ ice40/examples/blinky/blinky_tb.v | 25 +++++++++++++++++++++++++ ice40/examples/floorplan/.gitignore | 4 ++++ ice40/examples/floorplan/floorplan.py | 5 +++++ ice40/examples/floorplan/floorplan.sh | 6 ++++++ ice40/examples/floorplan/floorplan.v | 22 ++++++++++++++++++++++ ice40/examples/floorplan/icebreaker.pcf | 5 +++++ 17 files changed, 126 insertions(+), 84 deletions(-) delete mode 100644 ice40/blinky.pcf delete mode 100644 ice40/blinky.proj delete mode 100755 ice40/blinky.sh delete mode 100644 ice40/blinky.v delete mode 100644 ice40/blinky.ys delete mode 100644 ice40/blinky_tb.v create mode 100644 ice40/examples/blinky/blinky.pcf create mode 100644 ice40/examples/blinky/blinky.proj create mode 100755 ice40/examples/blinky/blinky.sh create mode 100644 ice40/examples/blinky/blinky.v create mode 100644 ice40/examples/blinky/blinky.ys create mode 100644 ice40/examples/blinky/blinky_tb.v create mode 100644 ice40/examples/floorplan/.gitignore create mode 100644 ice40/examples/floorplan/floorplan.py create mode 100755 ice40/examples/floorplan/floorplan.sh create mode 100644 ice40/examples/floorplan/floorplan.v create mode 100644 ice40/examples/floorplan/icebreaker.pcf (limited to 'ice40') diff --git a/ice40/blinky.pcf b/ice40/blinky.pcf deleted file mode 100644 index 141dfcc8..00000000 --- a/ice40/blinky.pcf +++ /dev/null @@ -1,6 +0,0 @@ -set_io led1 99 -set_io led2 98 -set_io led3 97 -set_io led4 96 -set_io led5 95 -set_io clki 21 diff --git a/ice40/blinky.proj b/ice40/blinky.proj deleted file mode 100644 index f5bb9f88..00000000 --- a/ice40/blinky.proj +++ /dev/null @@ -1,15 +0,0 @@ -{ - "project": { - "version": "1", - "name": "blinky", - "arch": { - "name": "ice40", - "type": "hx1k", - "package": "tq144" - }, - "input": { - "json": "blinky.json", - "pcf": "blinky.pcf" - } - } -} diff --git a/ice40/blinky.sh b/ice40/blinky.sh deleted file mode 100755 index a2326fc3..00000000 --- a/ice40/blinky.sh +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/bash -set -ex -yosys blinky.ys -../nextpnr-ice40 --json blinky.json --pcf blinky.pcf --asc blinky.asc -icepack blinky.asc blinky.bin -icebox_vlog blinky.asc > blinky_chip.v -iverilog -o blinky_tb blinky_chip.v blinky_tb.v -vvp -N ./blinky_tb diff --git a/ice40/blinky.v b/ice40/blinky.v deleted file mode 100644 index 36eaee86..00000000 --- a/ice40/blinky.v +++ /dev/null @@ -1,27 +0,0 @@ -module blinky ( - input clki, - output led1, - output led2, - output led3, - output led4, - output led5 -); - - SB_GB clk_gb ( - .USER_SIGNAL_TO_GLOBAL_BUFFER(clki), - .GLOBAL_BUFFER_OUTPUT(clk) - ); - - localparam BITS = 5; - localparam LOG2DELAY = 21; - - reg [BITS+LOG2DELAY-1:0] counter = 0; - reg [BITS-1:0] outcnt; - - always @(posedge clk) begin - counter <= counter + 1; - outcnt <= counter >> LOG2DELAY; - end - - assign {led1, led2, led3, led4, led5} = outcnt ^ (outcnt >> 1); -endmodule diff --git a/ice40/blinky.ys b/ice40/blinky.ys deleted file mode 100644 index a5dd2c85..00000000 --- a/ice40/blinky.ys +++ /dev/null @@ -1,3 +0,0 @@ -read_verilog blinky.v -synth_ice40 -top blinky -write_json blinky.json diff --git a/ice40/blinky_tb.v b/ice40/blinky_tb.v deleted file mode 100644 index f80b5e64..00000000 --- a/ice40/blinky_tb.v +++ /dev/null @@ -1,25 +0,0 @@ -module blinky_tb; - reg clk; - always #5 clk = (clk === 1'b0); - - wire led1, led2, led3, led4, led5; - - chip uut ( - .io_0_8_1(clk), - .io_13_12_1(led1), - .io_13_12_0(led2), - .io_13_11_1(led3), - .io_13_11_0(led4), - .io_13_9_1(led5) - ); - - initial begin - // $dumpfile("blinky_tb.vcd"); - // $dumpvars(0, blinky_tb); - repeat (10) begin - repeat (900000) @(posedge clk); - $display(led1, led2, led3, led4, led5); - end - $finish; - end -endmodule diff --git a/ice40/examples/blinky/blinky.pcf b/ice40/examples/blinky/blinky.pcf new file mode 100644 index 00000000..141dfcc8 --- /dev/null +++ b/ice40/examples/blinky/blinky.pcf @@ -0,0 +1,6 @@ +set_io led1 99 +set_io led2 98 +set_io led3 97 +set_io led4 96 +set_io led5 95 +set_io clki 21 diff --git a/ice40/examples/blinky/blinky.proj b/ice40/examples/blinky/blinky.proj new file mode 100644 index 00000000..f5bb9f88 --- /dev/null +++ b/ice40/examples/blinky/blinky.proj @@ -0,0 +1,15 @@ +{ + "project": { + "version": "1", + "name": "blinky", + "arch": { + "name": "ice40", + "type": "hx1k", + "package": "tq144" + }, + "input": { + "json": "blinky.json", + "pcf": "blinky.pcf" + } + } +} diff --git a/ice40/examples/blinky/blinky.sh b/ice40/examples/blinky/blinky.sh new file mode 100755 index 00000000..a2326fc3 --- /dev/null +++ b/ice40/examples/blinky/blinky.sh @@ -0,0 +1,8 @@ +#!/bin/bash +set -ex +yosys blinky.ys +../nextpnr-ice40 --json blinky.json --pcf blinky.pcf --asc blinky.asc +icepack blinky.asc blinky.bin +icebox_vlog blinky.asc > blinky_chip.v +iverilog -o blinky_tb blinky_chip.v blinky_tb.v +vvp -N ./blinky_tb diff --git a/ice40/examples/blinky/blinky.v b/ice40/examples/blinky/blinky.v new file mode 100644 index 00000000..36eaee86 --- /dev/null +++ b/ice40/examples/blinky/blinky.v @@ -0,0 +1,27 @@ +module blinky ( + input clki, + output led1, + output led2, + output led3, + output led4, + output led5 +); + + SB_GB clk_gb ( + .USER_SIGNAL_TO_GLOBAL_BUFFER(clki), + .GLOBAL_BUFFER_OUTPUT(clk) + ); + + localparam BITS = 5; + localparam LOG2DELAY = 21; + + reg [BITS+LOG2DELAY-1:0] counter = 0; + reg [BITS-1:0] outcnt; + + always @(posedge clk) begin + counter <= counter + 1; + outcnt <= counter >> LOG2DELAY; + end + + assign {led1, led2, led3, led4, led5} = outcnt ^ (outcnt >> 1); +endmodule diff --git a/ice40/examples/blinky/blinky.ys b/ice40/examples/blinky/blinky.ys new file mode 100644 index 00000000..a5dd2c85 --- /dev/null +++ b/ice40/examples/blinky/blinky.ys @@ -0,0 +1,3 @@ +read_verilog blinky.v +synth_ice40 -top blinky +write_json blinky.json diff --git a/ice40/examples/blinky/blinky_tb.v b/ice40/examples/blinky/blinky_tb.v new file mode 100644 index 00000000..f80b5e64 --- /dev/null +++ b/ice40/examples/blinky/blinky_tb.v @@ -0,0 +1,25 @@ +module blinky_tb; + reg clk; + always #5 clk = (clk === 1'b0); + + wire led1, led2, led3, led4, led5; + + chip uut ( + .io_0_8_1(clk), + .io_13_12_1(led1), + .io_13_12_0(led2), + .io_13_11_1(led3), + .io_13_11_0(led4), + .io_13_9_1(led5) + ); + + initial begin + // $dumpfile("blinky_tb.vcd"); + // $dumpvars(0, blinky_tb); + repeat (10) begin + repeat (900000) @(posedge clk); + $display(led1, led2, led3, led4, led5); + end + $finish; + end +endmodule diff --git a/ice40/examples/floorplan/.gitignore b/ice40/examples/floorplan/.gitignore new file mode 100644 index 00000000..d93659be --- /dev/null +++ b/ice40/examples/floorplan/.gitignore @@ -0,0 +1,4 @@ +*.json +*.asc +*.bin +__pycache__ \ No newline at end of file diff --git a/ice40/examples/floorplan/floorplan.py b/ice40/examples/floorplan/floorplan.py new file mode 100644 index 00000000..85c53ccd --- /dev/null +++ b/ice40/examples/floorplan/floorplan.py @@ -0,0 +1,5 @@ +ctx.createRectangularRegion("osc", 1, 1, 1, 4) +for cell, cellinfo in ctx.cells: + if "ringosc" in cellinfo.attrs: + print("Floorplanned cell %s" % cell) + ctx.constrainCellToRegion(cell, "osc") diff --git a/ice40/examples/floorplan/floorplan.sh b/ice40/examples/floorplan/floorplan.sh new file mode 100755 index 00000000..e0ed7a64 --- /dev/null +++ b/ice40/examples/floorplan/floorplan.sh @@ -0,0 +1,6 @@ +#!/usr/bin/env bash +set -ex +yosys -p "synth_ice40 -top top -json floorplan.json" floorplan.v +../../../nextpnr-ice40 --up5k --json floorplan.json --pcf icebreaker.pcf --asc floorplan.asc --ignore-loops --pre-place floorplan.py +icepack floorplan.asc floorplan.bin +iceprog floorplan.bin diff --git a/ice40/examples/floorplan/floorplan.v b/ice40/examples/floorplan/floorplan.v new file mode 100644 index 00000000..8f99ed4e --- /dev/null +++ b/ice40/examples/floorplan/floorplan.v @@ -0,0 +1,22 @@ +module top(output LED1, LED2, LED3, LED4, LED5); + localparam N = 31; + wire [N:0] x; + assign x[0] = x[N]; + + genvar ii; + generate + + for (ii = 0; ii < N; ii = ii + 1) begin + (* ringosc *) + SB_LUT4 #(.LUT_INIT(1)) lut_i(.I0(x[ii]), .I1(), .I2(), .I3(), .O(x[ii+1])); + end + endgenerate + + assign clk = x[N]; + + + reg [19:0] ctr; + always @(posedge clk) + ctr <= ctr + 1'b1; + assign {LED5, LED4, LED3, LED2, LED1} = ctr[19:15]; +endmodule diff --git a/ice40/examples/floorplan/icebreaker.pcf b/ice40/examples/floorplan/icebreaker.pcf new file mode 100644 index 00000000..ac7ebf9e --- /dev/null +++ b/ice40/examples/floorplan/icebreaker.pcf @@ -0,0 +1,5 @@ +set_io -nowarn LED1 26 +set_io -nowarn LED2 27 +set_io -nowarn LED3 25 +set_io -nowarn LED4 23 +set_io -nowarn LED5 21 -- cgit v1.2.3 From ea56dc9d084a694450d995d147b18a4de86e8b7c Mon Sep 17 00:00:00 2001 From: David Shah Date: Thu, 10 Jan 2019 16:42:29 +0000 Subject: HeAP: Add TAUCS wrapper and integration Signed-off-by: David Shah --- ice40/arch.cc | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'ice40') diff --git a/ice40/arch.cc b/ice40/arch.cc index fbe882fc..5688b6e6 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -26,10 +26,10 @@ #include "log.h" #include "nextpnr.h" #include "placer1.h" +#include "placer_heap.h" #include "router1.h" #include "timing_opt.h" #include "util.h" - NEXTPNR_NAMESPACE_BEGIN // ----------------------------------------------------------------------- @@ -671,7 +671,9 @@ bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay bool Arch::place() { - if (!placer1(getCtx(), Placer1Cfg(getCtx()))) + // if (!placer1(getCtx(), Placer1Cfg(getCtx()))) + // return false; + if (!placer_heap(getCtx())) return false; if (bool_or_default(settings, id("opt_timing"), false)) { TimingOptCfg tocfg(getCtx()); -- cgit v1.2.3 From 7142db28a8b828da557729a706c20c8f330ba129 Mon Sep 17 00:00:00 2001 From: David Shah Date: Mon, 25 Feb 2019 11:56:10 +0000 Subject: HeAP: Make HeAP placer optional A CMake option 'BUILD_HEAP' (default on) configures building of the HeAP placer and the associated Eigen3 dependency. Default for the iCE40 is SA placer, with --heap-placer to use HeAP Default for the ECP5 is HeAP placer, as SA placer can take 1hr+ for large ECP5 designs and HeAP tends to give better QoR. --sa-placer can be used to use SA instead, and auto-fallback to SA if HeAP not built. Signed-off-by: David Shah --- ice40/arch.cc | 11 +++++++---- ice40/main.cc | 5 ++++- 2 files changed, 11 insertions(+), 5 deletions(-) (limited to 'ice40') diff --git a/ice40/arch.cc b/ice40/arch.cc index 5688b6e6..09e64b16 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -671,10 +671,13 @@ bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay bool Arch::place() { - // if (!placer1(getCtx(), Placer1Cfg(getCtx()))) - // return false; - if (!placer_heap(getCtx())) - return false; + if (bool_or_default(settings, id("heap_placer"), false)) { + if (!placer_heap(getCtx())) + return false; + } else { + if (!placer1(getCtx(), Placer1Cfg(getCtx()))) + return false; + } if (bool_or_default(settings, id("opt_timing"), false)) { TimingOptCfg tocfg(getCtx()); tocfg.cellTypes.insert(id_ICESTORM_LC); diff --git a/ice40/main.cc b/ice40/main.cc index 2313c2ae..7233f169 100644 --- a/ice40/main.cc +++ b/ice40/main.cc @@ -69,6 +69,8 @@ po::options_description Ice40CommandHandler::getArchOptions() specific.add_options()("promote-logic", "enable promotion of 'logic' globals (in addition to clk/ce/sr by default)"); specific.add_options()("no-promote-globals", "disable all global promotion"); + specific.add_options()("heap-placer", + "use HeAP analytic placer instead of simulated annealing (faster, experimental)"); specific.add_options()("opt-timing", "run post-placement timing optimisation pass (experimental)"); specific.add_options()("tmfuzz", "run path delay estimate fuzzer"); specific.add_options()("pcf-allow-unconstrained", "don't require PCF to constrain all IO"); @@ -176,7 +178,8 @@ std::unique_ptr Ice40CommandHandler::createContext() ctx->settings[ctx->id("opt_timing")] = "1"; if (vm.count("pcf-allow-unconstrained")) ctx->settings[ctx->id("pcf_allow_unconstrained")] = "1"; - + if (vm.count("heap-placer")) + ctx->settings[ctx->id("heap_placer")] = "1"; return ctx; } -- cgit v1.2.3 From bd12c0a4866e0d67bedd1c40f1205e9168b5d428 Mon Sep 17 00:00:00 2001 From: David Shah Date: Mon, 25 Feb 2019 12:48:01 +0000 Subject: HeAP: Add PlacerHeapCfg Signed-off-by: David Shah --- ice40/arch.cc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'ice40') diff --git a/ice40/arch.cc b/ice40/arch.cc index 09e64b16..ce824c83 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -672,7 +672,9 @@ bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay bool Arch::place() { if (bool_or_default(settings, id("heap_placer"), false)) { - if (!placer_heap(getCtx())) + PlacerHeapCfg cfg(getCtx()); + cfg.ioBufTypes.insert(id_SB_IO); + if (!placer_heap(getCtx(), cfg)) return false; } else { if (!placer1(getCtx(), Placer1Cfg(getCtx()))) -- cgit v1.2.3 From 02ae21d8fc3bc1375848f40702cd4bb7f6700595 Mon Sep 17 00:00:00 2001 From: David Shah Date: Sun, 24 Mar 2019 11:10:20 +0000 Subject: Add --placer option and refactor placer selection Signed-off-by: David Shah --- ice40/arch.cc | 15 +++++++++++++-- ice40/arch.h | 3 +++ ice40/main.cc | 4 ---- 3 files changed, 16 insertions(+), 6 deletions(-) (limited to 'ice40') diff --git a/ice40/arch.cc b/ice40/arch.cc index ce824c83..b0839fa5 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -671,14 +671,17 @@ bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay bool Arch::place() { - if (bool_or_default(settings, id("heap_placer"), false)) { + std::string placer = str_or_default(settings, id("placer"), defaultPlacer); + if (placer == "heap") { PlacerHeapCfg cfg(getCtx()); cfg.ioBufTypes.insert(id_SB_IO); if (!placer_heap(getCtx(), cfg)) return false; - } else { + } else if (placer == "sa") { if (!placer1(getCtx(), Placer1Cfg(getCtx()))) return false; + } else { + log_error("iCE40 architecture does not support placer '%s'\n", placer.c_str()); } if (bool_or_default(settings, id("opt_timing"), false)) { TimingOptCfg tocfg(getCtx()); @@ -1205,4 +1208,12 @@ void Arch::assignCellInfo(CellInfo *cell) } } +const std::string Arch::defaultPlacer = "sa"; + +const std::vector Arch::availablePlacers = {"sa", +#ifdef WITH_HEAP + "heap" +#endif +}; + NEXTPNR_NAMESPACE_END diff --git a/ice40/arch.h b/ice40/arch.h index 706043b2..ea29f4f1 100644 --- a/ice40/arch.h +++ b/ice40/arch.h @@ -897,6 +897,9 @@ struct Arch : BaseCtx IdString glb_net = getWireName(getBelPinWire(bel, id_GLOBAL_BUFFER_OUTPUT)); return std::stoi(std::string("") + glb_net.str(this).back()); } + + static const std::string defaultPlacer; + static const std::vector availablePlacers; }; void ice40DelayFuzzerMain(Context *ctx); diff --git a/ice40/main.cc b/ice40/main.cc index 7233f169..9b79a08c 100644 --- a/ice40/main.cc +++ b/ice40/main.cc @@ -69,8 +69,6 @@ po::options_description Ice40CommandHandler::getArchOptions() specific.add_options()("promote-logic", "enable promotion of 'logic' globals (in addition to clk/ce/sr by default)"); specific.add_options()("no-promote-globals", "disable all global promotion"); - specific.add_options()("heap-placer", - "use HeAP analytic placer instead of simulated annealing (faster, experimental)"); specific.add_options()("opt-timing", "run post-placement timing optimisation pass (experimental)"); specific.add_options()("tmfuzz", "run path delay estimate fuzzer"); specific.add_options()("pcf-allow-unconstrained", "don't require PCF to constrain all IO"); @@ -178,8 +176,6 @@ std::unique_ptr Ice40CommandHandler::createContext() ctx->settings[ctx->id("opt_timing")] = "1"; if (vm.count("pcf-allow-unconstrained")) ctx->settings[ctx->id("pcf_allow_unconstrained")] = "1"; - if (vm.count("heap-placer")) - ctx->settings[ctx->id("heap_placer")] = "1"; return ctx; } -- cgit v1.2.3