From 6acf23cf37285e16050b44370be6cbe7dd3e0dc5 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 16 Jun 2018 15:23:04 +0200
Subject: Some refactoring of Chip API (prep for chipdb refactoring)

Signed-off-by: Clifford Wolf <clifford@clifford.at>
---
 ice40/chip.cc   | 12 ++++++------
 ice40/chip.h    | 58 +++++++++++++++++++++++++++++++++++++++------------------
 ice40/chipdb.py |  2 +-
 3 files changed, 47 insertions(+), 25 deletions(-)

(limited to 'ice40')

diff --git a/ice40/chip.cc b/ice40/chip.cc
index b40963bf..db293f43 100644
--- a/ice40/chip.cc
+++ b/ice40/chip.cc
@@ -275,7 +275,7 @@ BelId Chip::getPackagePinBel(const std::string &pin) const
 
 // -----------------------------------------------------------------------
 
-bool Chip::estimatePosition(BelId bel, float &x, float &y) const
+bool Chip::estimatePosition(BelId bel, int &x, int &y) const
 {
     assert(bel != BelId());
     x = chip_info.bel_data[bel.index].x;
@@ -284,15 +284,15 @@ bool Chip::estimatePosition(BelId bel, float &x, float &y) const
     return chip_info.bel_data[bel.index].type != TYPE_SB_GB;
 }
 
-float Chip::estimateDelay(WireId src, WireId dst) const
+delay_t Chip::estimateDelay(WireId src, WireId dst) const
 {
     assert(src != WireId());
-    float x1 = chip_info.wire_data[src.index].x;
-    float y1 = chip_info.wire_data[src.index].y;
+    delay_t x1 = chip_info.wire_data[src.index].x;
+    delay_t y1 = chip_info.wire_data[src.index].y;
 
     assert(dst != WireId());
-    float x2 = chip_info.wire_data[dst.index].x;
-    float y2 = chip_info.wire_data[dst.index].y;
+    delay_t x2 = chip_info.wire_data[dst.index].x;
+    delay_t y2 = chip_info.wire_data[dst.index].y;
 
     return fabsf(x1 - x2) + fabsf(y1 - y2);
 }
diff --git a/ice40/chip.h b/ice40/chip.h
index e2b54cdf..7460d3b2 100644
--- a/ice40/chip.h
+++ b/ice40/chip.h
@@ -26,13 +26,15 @@
 
 NEXTPNR_NAMESPACE_BEGIN
 
+typedef int delay_t;
+
 struct DelayInfo
 {
-    float delay = 0;
+    delay_t delay = 0;
 
-    float raiseDelay() const { return delay; }
-    float fallDelay() const { return delay; }
-    float avgDelay() const { return delay; }
+    delay_t raiseDelay() const { return delay; }
+    delay_t fallDelay() const { return delay; }
+    delay_t avgDelay() const { return delay; }
 
     DelayInfo operator+(const DelayInfo &other) const
     {
@@ -44,7 +46,7 @@ struct DelayInfo
 
 // -----------------------------------------------------------------------
 
-enum BelType
+enum BelType : int32_t
 {
     TYPE_NONE,
     TYPE_ICESTORM_LC,
@@ -56,7 +58,7 @@ enum BelType
 IdString belTypeToId(BelType type);
 BelType belTypeFromId(IdString id);
 
-enum PortPin
+enum PortPin : int32_t
 {
     PIN_NONE,
 #define X(t) PIN_##t,
@@ -70,6 +72,26 @@ PortPin portPinFromId(IdString id);
 
 // -----------------------------------------------------------------------
 
+#if 0
+template <typename T>
+struct RelPtr {
+    int offset;
+
+    // RelPtr(T *ptr) : offset(reinterpret_cast<const char*>(ptr) -
+    //                         reinterpret_cast<const char*>(this)) {}
+
+    T&operator*() {
+        return *reinterpret_cast<T*>(reinterpret_cast<char*>(this) + offset);
+    }
+
+    T*operator->() {
+        return reinterpret_cast<T*>(reinterpret_cast<char*>(this) + offset);
+    }
+};
+#else
+template <typename T> using RelPtr = T *;
+#endif
+
 struct BelWirePOD
 {
     int32_t wire_index;
@@ -78,10 +100,10 @@ struct BelWirePOD
 
 struct BelInfoPOD
 {
-    const char *name;
+    RelPtr<char> name;
     BelType type;
-    int num_bel_wires;
-    BelWirePOD *bel_wires;
+    int32_t num_bel_wires;
+    RelPtr<BelWirePOD> bel_wires;
     int8_t x, y, z;
 };
 
@@ -94,7 +116,7 @@ struct BelPortPOD
 struct PipInfoPOD
 {
     int32_t src, dst;
-    float delay;
+    int32_t delay;
     int8_t x, y;
     int16_t switch_mask;
     int32_t switch_index;
@@ -102,15 +124,15 @@ struct PipInfoPOD
 
 struct WireInfoPOD
 {
-    const char *name;
-    int num_uphill, num_downhill;
-    int *pips_uphill, *pips_downhill;
+    RelPtr<char> name;
+    int32_t num_uphill, num_downhill;
+    RelPtr<int32_t> pips_uphill, pips_downhill;
 
-    int num_bels_downhill;
+    int32_t num_bels_downhill;
     BelPortPOD bel_uphill;
-    BelPortPOD *bels_downhill;
+    RelPtr<BelPortPOD> bels_downhill;
 
-    float x, y;
+    int8_t x, y;
 };
 
 struct PackagePinPOD
@@ -694,8 +716,8 @@ struct Chip
 
     // -------------------------------------------------
 
-    bool estimatePosition(BelId bel, float &x, float &y) const;
-    float estimateDelay(WireId src, WireId dst) const;
+    bool estimatePosition(BelId bel, int &x, int &y) const;
+    delay_t estimateDelay(WireId src, WireId dst) const;
 
     // -------------------------------------------------
 
diff --git a/ice40/chipdb.py b/ice40/chipdb.py
index 7873dcd7..f8fe8b5d 100644
--- a/ice40/chipdb.py
+++ b/ice40/chipdb.py
@@ -430,7 +430,7 @@ for wire in range(num_wires):
         avg_x /= len(wire_xy[wire])
         avg_y /= len(wire_xy[wire])
 
-    info += "%f, %f}" % (avg_x, avg_y)
+    info += "%d, %d}" % (round(avg_x), round(avg_y))
 
     wireinfo.append(info)
 
-- 
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