From 2e68962a025999ec85276f6362540c13ccfcd752 Mon Sep 17 00:00:00 2001 From: YRabbit Date: Sun, 4 Dec 2022 15:06:44 +1000 Subject: gowin: add PLL pins processing Uses the information of the special input pins for the PLL in the current chip. If such pins are involved, no routing is performed and information about the use of implicit wires is passed to the packer. The RESET and RESET_P inputs are now also disabled if they are connected to VSS/VCC. Signed-off-by: YRabbit --- gowin/cells.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'gowin/cells.h') diff --git a/gowin/cells.h b/gowin/cells.h index 227206c8..ae475b77 100644 --- a/gowin/cells.h +++ b/gowin/cells.h @@ -105,6 +105,8 @@ inline bool is_lc(const BaseCtx *ctx, const CellInfo *cell) { return cell->type inline bool is_sram(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == id_RAM16SDP4; } +inline bool is_iob(const Context *ctx, const CellInfo *cell) { return (cell->type.index == ID_IOB); } + // Convert a LUT primitive to (part of) an GENERIC_SLICE, swapping ports // as needed. Set no_dff if a DFF is not being used, so that the output // can be reconnected -- cgit v1.2.3