From df7e26c1aa9b8727bacf56ab0d592df5cef63bb5 Mon Sep 17 00:00:00 2001
From: gatecat <gatecat@ds0.me>
Date: Wed, 9 Mar 2022 17:12:59 +0000
Subject: clangformat

Signed-off-by: gatecat <gatecat@ds0.me>
---
 fpga_interchange/arch.h                   | 2 +-
 fpga_interchange/site_lut_mapping_cache.h | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

(limited to 'fpga_interchange')

diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h
index 78877452..789b188e 100644
--- a/fpga_interchange/arch.h
+++ b/fpga_interchange/arch.h
@@ -1134,7 +1134,7 @@ struct Arch : ArchAPI<ArchRanges>
     IdString vcc_cell_pin;
     std::vector<std::vector<LutElement>> lut_elements;
     dict<IdString, const LutCellPOD *> lut_cells;
-    
+
     // Defines the max number of LUT cells in a site and LUT pins
     // to allow a correct functioning of the site lut mapping cache
     int max_lut_cells;
diff --git a/fpga_interchange/site_lut_mapping_cache.h b/fpga_interchange/site_lut_mapping_cache.h
index 3efd040f..31e7e5e1 100644
--- a/fpga_interchange/site_lut_mapping_cache.h
+++ b/fpga_interchange/site_lut_mapping_cache.h
@@ -51,9 +51,9 @@ struct SiteLutMappingKey
         }
     };
 
-    int32_t tileType;                      // Tile type
-    int32_t siteType;                      // Site type in that tile type
-    size_t numCells;                       // LUT cell count
+    int32_t tileType;        // Tile type
+    int32_t siteType;        // Site type in that tile type
+    size_t numCells;         // LUT cell count
     std::vector<Cell> cells; // LUT cell data
 
     unsigned int hash_; // Precomputed hash
-- 
cgit v1.2.3