From 8d1eb0a1950816d4dcaae40fb230acff0d1afeef Mon Sep 17 00:00:00 2001 From: Keith Rothman <537074+litghost@users.noreply.github.com> Date: Mon, 22 Mar 2021 17:46:00 -0700 Subject: Initial lookahead for FPGA interchange. Currently the lookahead is disabled by default because of the time to compute and RAM usage. However it does appear to work reasonably well in testing. Further effort is required to lower RAM usage after initial computation, and explore trade-off for cheaper time to compute. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> --- fpga_interchange/main.cc | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'fpga_interchange/main.cc') diff --git a/fpga_interchange/main.cc b/fpga_interchange/main.cc index 958f1d95..4d331a32 100644 --- a/fpga_interchange/main.cc +++ b/fpga_interchange/main.cc @@ -55,6 +55,8 @@ po::options_description FpgaInterchangeCommandHandler::getArchOptions() specific.add_options()("netlist", po::value(), "FPGA interchange logical netlist to read"); specific.add_options()("phys", po::value(), "FPGA interchange Physical netlist to write"); specific.add_options()("package", po::value(), "Package to use"); + specific.add_options()("rebuild-lookahead", "Ignore lookahead cache and rebuild"); + specific.add_options()("dont-write-lookahead", "Don't write the lookahead file"); return specific; } @@ -72,6 +74,9 @@ std::unique_ptr FpgaInterchangeCommandHandler::createContext(std::unord auto start = std::chrono::high_resolution_clock::now(); ArchArgs chipArgs; + chipArgs.rebuild_lookahead = vm.count("rebuild_lookahead") != 0; + chipArgs.dont_write_lookahead = vm.count("dont_write_lookahead") != 0; + if (!vm.count("chipdb")) { log_error("chip database binary must be provided\n"); } -- cgit v1.2.3