From 5e96740451912cbd68aecdbe58d776831d282cba Mon Sep 17 00:00:00 2001 From: Keith Rothman <537074+litghost@users.noreply.github.com> Date: Tue, 23 Mar 2021 10:57:37 -0700 Subject: [FPGA interchange] Small fix to get_net_type. If get_net_type was called before the driver was placed, it could return the wrong value. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> --- fpga_interchange/arch.h | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'fpga_interchange/arch.h') diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h index ece8be7f..2162ce90 100644 --- a/fpga_interchange/arch.h +++ b/fpga_interchange/arch.h @@ -217,10 +217,15 @@ struct Arch : ArchAPI PhysicalNetlist::PhysNetlist::NetType get_net_type(NetInfo *net) const { - NPNR_ASSERT(net->driver.cell != nullptr); - if (net->driver.cell->bel == get_gnd_bel()) { + NPNR_ASSERT(net != nullptr); + IdString gnd_cell_name(chip_info->constants->gnd_cell_name); + IdString gnd_cell_port(chip_info->constants->gnd_cell_port); + + IdString vcc_cell_name(chip_info->constants->vcc_cell_name); + IdString vcc_cell_port(chip_info->constants->vcc_cell_port); + if (net->driver.cell->type == gnd_cell_name && net->driver.port == gnd_cell_port) { return PhysicalNetlist::PhysNetlist::NetType::GND; - } else if (net->driver.cell->bel == get_vcc_bel()) { + } else if (net->driver.cell->type == vcc_cell_name && net->driver.port == vcc_cell_port) { return PhysicalNetlist::PhysNetlist::NetType::VCC; } else { return PhysicalNetlist::PhysNetlist::NetType::SIGNAL; -- cgit v1.2.3 From 77bc2f9130204e40023411c3fd13b3a3a3aa8a5b Mon Sep 17 00:00:00 2001 From: Keith Rothman <537074+litghost@users.noreply.github.com> Date: Tue, 23 Mar 2021 16:53:42 -0700 Subject: Add initial handling of local site inverters and constant signals. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> --- fpga_interchange/arch.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'fpga_interchange/arch.h') diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h index 2162ce90..23aed6bc 100644 --- a/fpga_interchange/arch.h +++ b/fpga_interchange/arch.h @@ -1075,6 +1075,19 @@ struct Arch : ArchAPI std::string chipdb_hash; std::string get_chipdb_hash() const; + + // Masking moves BEL pins from cell_bel_pins to masked_cell_bel_pins for + // the purposes routing. The idea is that masked BEL pins are already + // handled during site routing, and they shouldn't be visible to the + // router. + void mask_bel_pins_on_site_wire(NetInfo *net, WireId wire); + + // This removes pips and wires bound by the site router, and unmasks all + // BEL pins masked during site routing. + void remove_site_routing(); + + // This unmasks any BEL pins that were masked when site routing was bound. + void unmask_bel_pins(); }; NEXTPNR_NAMESPACE_END -- cgit v1.2.3 From 91ca5f110bdea0dbf1b6183d8129c3ea7b0c71c6 Mon Sep 17 00:00:00 2001 From: Keith Rothman <537074+litghost@users.noreply.github.com> Date: Wed, 24 Mar 2021 16:25:15 -0700 Subject: Re-work LUT mapping logic to only put VCC pins when required. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> --- fpga_interchange/arch.h | 1 - 1 file changed, 1 deletion(-) (limited to 'fpga_interchange/arch.h') diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h index 23aed6bc..f6a8f0eb 100644 --- a/fpga_interchange/arch.h +++ b/fpga_interchange/arch.h @@ -1064,7 +1064,6 @@ struct Arch : ArchAPI std::regex verilog_bin_constant; std::regex verilog_hex_constant; void read_lut_equation(DynamicBitarray<> *equation, const Property &equation_parameter) const; - bool route_vcc_to_unused_lut_pins(); IdString id_GND; IdString id_VCC; -- cgit v1.2.3 From c8dccd3e7bec95c635ebe435c8454ffe10edd6f3 Mon Sep 17 00:00:00 2001 From: Keith Rothman <537074+litghost@users.noreply.github.com> Date: Thu, 25 Mar 2021 17:11:06 -0700 Subject: Implement debugging tools for site router. - Finishes implementation of SiteArch::nameOfPip and SiteArch::nameOfWire - Adds "explain_bel_status", which should be an exhaustive diagnostic of the status of a BEL placement. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> --- fpga_interchange/arch.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'fpga_interchange/arch.h') diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h index f6a8f0eb..642060cc 100644 --- a/fpga_interchange/arch.h +++ b/fpga_interchange/arch.h @@ -1087,6 +1087,8 @@ struct Arch : ArchAPI // This unmasks any BEL pins that were masked when site routing was bound. void unmask_bel_pins(); + + void explain_bel_status(BelId bel) const; }; NEXTPNR_NAMESPACE_END -- cgit v1.2.3