From ac5d767d4fc96a02cfcf5f06930c1aa5f41c97b4 Mon Sep 17 00:00:00 2001
From: Sylvain Munaut <tnt@246tNt.com>
Date: Fri, 16 Nov 2018 22:55:31 +0100
Subject: ice40/pack: Stop looking for BEL when we have one during PLL
 placement

Ideally we should first process all the PLL that are constrained somehow
(either explicitely or because they are PAD) and then free place the rest.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
---
 ice40/pack.cc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/ice40/pack.cc b/ice40/pack.cc
index c7614830..c91c97be 100644
--- a/ice40/pack.cc
+++ b/ice40/pack.cc
@@ -881,6 +881,7 @@ static void pack_special(Context *ctx)
                     packed->attrs[ctx->id("BEL")] = ctx->getBelName(bel).str(ctx);
                     pll_bel = bel;
                     constrained = true;
+                    break;
                 }
                 if (!constrained) {
                     log_error("Could not constrain PLL '%s' to any PLL Bel (too many PLLs?)\n",
-- 
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