From f4d8a25fb74a15da76359c5737098a7fd83e193c Mon Sep 17 00:00:00 2001 From: David Shah Date: Sun, 27 Jan 2019 14:43:10 +0000 Subject: ice40: Add budget override for CO->I3 path Signed-off-by: David Shah --- ice40/arch.cc | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/ice40/arch.cc b/ice40/arch.cc index 04c70e94..46faafc4 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -621,6 +621,29 @@ bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay } } return true; + } else if (driver.port == id_COUT && sink.port == id_I3) { + bool same_y = driver.cell->constr_abs_z && driver.cell->constr_z < 7; + switch (args.type) { +#ifndef ICE40_HX1K_ONLY + case ArchArgs::HX8K: +#endif + case ArchArgs::HX1K: + budget = same_y ? 260 : 560; + break; +#ifndef ICE40_HX1K_ONLY + case ArchArgs::LP384: + case ArchArgs::LP1K: + case ArchArgs::LP8K: + budget = same_y ? 380 : 670; + break; + case ArchArgs::UP5K: + budget = same_y ? 660 : 1220; + break; +#endif + default: + log_error("Unsupported iCE40 chip type.\n"); + } + return true; } return false; } -- cgit v1.2.3 From 77bb5ea63a86f2ce5feb2f3ee13d920c85c29111 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Tue, 29 Jan 2019 10:43:14 -0800 Subject: [ice40] Refactor Arch::getBudgetOverride() --- ice40/arch.cc | 38 +++++++++----------------------------- 1 file changed, 9 insertions(+), 29 deletions(-) diff --git a/ice40/arch.cc b/ice40/arch.cc index 46faafc4..3c2f0380 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -594,26 +594,29 @@ std::vector Arch::getGroupGroups(GroupId group) const bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t &budget) const { const auto &driver = net_info->driver; - if (driver.port == id_COUT && sink.port == id_CIN) { - if (driver.cell->constr_abs_z && driver.cell->constr_z < 7) + if (driver.port == id_COUT) { + NPNR_ASSERT(sink.port == id_CIN || sink.port == id_I3); + NPNR_ASSERT(driver.cell->constr_abs_z); + bool cin = sink.port == id_CIN; + bool same_y = driver.cell->constr_z < 7; + if (cin && same_y) budget = 0; else { - NPNR_ASSERT(driver.cell->constr_z == 7); switch (args.type) { #ifndef ICE40_HX1K_ONLY case ArchArgs::HX8K: #endif case ArchArgs::HX1K: - budget = 190; + budget = cin ? 190 : (same_y ? 260 : 560); break; #ifndef ICE40_HX1K_ONLY case ArchArgs::LP384: case ArchArgs::LP1K: case ArchArgs::LP8K: - budget = 290; + budget = cin ? 290 : (same_y ? 380 : 670); break; case ArchArgs::UP5K: - budget = 560; + budget = cin ? 560 : (same_y ? 660 : 1220); break; #endif default: @@ -621,29 +624,6 @@ bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay } } return true; - } else if (driver.port == id_COUT && sink.port == id_I3) { - bool same_y = driver.cell->constr_abs_z && driver.cell->constr_z < 7; - switch (args.type) { -#ifndef ICE40_HX1K_ONLY - case ArchArgs::HX8K: -#endif - case ArchArgs::HX1K: - budget = same_y ? 260 : 560; - break; -#ifndef ICE40_HX1K_ONLY - case ArchArgs::LP384: - case ArchArgs::LP1K: - case ArchArgs::LP8K: - budget = same_y ? 380 : 670; - break; - case ArchArgs::UP5K: - budget = same_y ? 660 : 1220; - break; -#endif - default: - log_error("Unsupported iCE40 chip type.\n"); - } - return true; } return false; } -- cgit v1.2.3 From 564a7e27b125302101c76f5b347880df0381a5ad Mon Sep 17 00:00:00 2001 From: David Shah Date: Fri, 14 Dec 2018 13:06:00 +0000 Subject: timing: Add --ignore-loops option Signed-off-by: David Shah --- common/command.cc | 6 ++++++ common/timing.cc | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/common/command.cc b/common/command.cc index 6ba3442f..8f18f54d 100644 --- a/common/command.cc +++ b/common/command.cc @@ -124,6 +124,8 @@ po::options_description CommandHandler::getGeneralOptions() general.add_options()("cstrweight", po::value(), "placer weighting for relative constraint satisfaction"); general.add_options()("pack-only", "pack design only without placement or routing"); + general.add_options()("ignore-loops", "ignore combinational loops in timing analysis"); + general.add_options()("version,V", "show version"); general.add_options()("test", "check architecture database integrity"); general.add_options()("freq", po::value(), "set target frequency for design in MHz"); @@ -172,6 +174,10 @@ void CommandHandler::setupContext(Context *ctx) } } + if (vm.count("ignore-loops")) { + settings->set("timing/ignoreLoops", true); + } + if (vm.count("cstrweight")) { settings->set("placer1/constraintWeight", vm["cstrweight"].as()); } diff --git a/common/timing.cc b/common/timing.cc index f3cb4306..13f0e07b 100644 --- a/common/timing.cc +++ b/common/timing.cc @@ -225,7 +225,7 @@ struct Timing } // Sanity check to ensure that all ports where fanins were recorded were indeed visited - if (!port_fanin.empty()) { + if (!port_fanin.empty() && !bool_or_default(ctx->settings, ctx->id("timing/ignoreLoops"), false)) { for (auto fanin : port_fanin) { NetInfo *net = fanin.first->net; if (net != nullptr) { -- cgit v1.2.3 From c6604a45826c690de3fcd09b46a027904ecff7cd Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Thu, 7 Feb 2019 17:25:14 +0100 Subject: Fix reading conflicting wire in GUI for pips, fixes #225 --- gui/designwidget.cc | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/gui/designwidget.cc b/gui/designwidget.cc index 235dd2cb..fc99cd14 100644 --- a/gui/designwidget.cc +++ b/gui/designwidget.cc @@ -706,8 +706,12 @@ void DesignWidget::onSelectionChanged(int num, const QItemSelection &, const QIt addProperty(topItem, QVariant::String, "Type", ctx->getPipType(pip).c_str(ctx)); addProperty(topItem, QVariant::Bool, "Available", ctx->checkPipAvail(pip)); addProperty(topItem, QVariant::String, "Bound Net", ctx->nameOf(ctx->getBoundPipNet(pip)), ElementType::NET); - addProperty(topItem, QVariant::String, "Conflicting Wire", - ctx->getWireName(ctx->getConflictingPipWire(pip)).c_str(ctx), ElementType::WIRE); + if (ctx->getConflictingPipWire(pip) != WireId()) { + addProperty(topItem, QVariant::String, "Conflicting Wire", + ctx->getWireName(ctx->getConflictingPipWire(pip)).c_str(ctx), ElementType::WIRE); + } else { + addProperty(topItem, QVariant::String, "Conflicting Wire", "", ElementType::NONE); + } addProperty(topItem, QVariant::String, "Conflicting Net", ctx->nameOf(ctx->getConflictingPipNet(pip)), ElementType::NET); addProperty(topItem, QVariant::String, "Src Wire", ctx->getWireName(ctx->getPipSrcWire(pip)).c_str(ctx), -- cgit v1.2.3 From bfc96cc962711a6e93eb0b7ce0dfefb6a41d8c31 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Thu, 7 Feb 2019 17:42:14 +0100 Subject: Better resize, FPGAViewWidget minimal is now 320x200, fixes #222 --- gui/fpgaviewwidget.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gui/fpgaviewwidget.cc b/gui/fpgaviewwidget.cc index 3fba6bff..0ad90527 100644 --- a/gui/fpgaviewwidget.cc +++ b/gui/fpgaviewwidget.cc @@ -102,7 +102,7 @@ void FPGAViewWidget::newContext(Context *ctx) pokeRenderer(); } -QSize FPGAViewWidget::minimumSizeHint() const { return QSize(640, 480); } +QSize FPGAViewWidget::minimumSizeHint() const { return QSize(320, 200); } QSize FPGAViewWidget::sizeHint() const { return QSize(640, 480); } -- cgit v1.2.3