From 19f828c91c836a6d8e04676ca76ec2c6d0004b8a Mon Sep 17 00:00:00 2001
From: David Shah <dave@ds0.me>
Date: Fri, 5 Oct 2018 11:35:37 +0100
Subject: ecp5: Dummy timing entry for BRAM

Signed-off-by: David Shah <dave@ds0.me>
---
 ecp5/arch.cc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/ecp5/arch.cc b/ecp5/arch.cc
index 9c059005..b3a40a03 100644
--- a/ecp5/arch.cc
+++ b/ecp5/arch.cc
@@ -582,6 +582,9 @@ TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, Id
         if (port == id_CLKO)
             return TMG_COMB_OUTPUT;
         return TMG_IGNORE;
+    } else if (cell->type == id_DP16KD) {
+        // FIXME
+        return TMG_IGNORE;
     } else {
         NPNR_ASSERT_FALSE_STR("no timing data for cell type '" + cell->type.str(this) + "'");
     }
-- 
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