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* Add IdString APIClifford Wolf2018-06-123-8/+11
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrDavid Shah2018-06-1213-7/+63
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| * Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrClifford Wolf2018-06-124-11/+19
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| * | Fix NEXTPNR_NAMESPACEClifford Wolf2018-06-125-6/+22
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrClifford Wolf2018-06-1216-10/+569
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| * | | Add nextpnr namespaceClifford Wolf2018-06-129-7/+47
| | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | ice40: Testing the placement validity checkDavid Shah2018-06-122-1/+28
| |_|/ |/| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | | ice40: Debugging and fixing FF configurationDavid Shah2018-06-124-11/+19
| |/ |/| | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Creating packer testsDavid Shah2018-06-124-0/+233
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | Implement the placement validity checkerDavid Shah2018-06-121-1/+1
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Adding a placement validity checkerDavid Shah2018-06-125-6/+148
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Pack constants to LCsDavid Shah2018-06-124-8/+35
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Debugging the packerDavid Shah2018-06-124-3/+36
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Start working on a packer, currently not testedDavid Shah2018-06-124-0/+124
|/ | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Adding cell utilities for packingDavid Shah2018-06-122-0/+164
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Optimising chipdb buildsDavid Shah2018-06-121-0/+1
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Add "nextpnr.h"Clifford Wolf2018-06-116-10/+9
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Remove pool, dict, vector namespace aliasesClifford Wolf2018-06-113-26/+27
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add conflicting=false argument to bind gettersClifford Wolf2018-06-111-3/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fixed portability issue, now it works on msys2 windows build as wellMiodrag Milanovic2018-06-111-2/+3
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* Pass design to gui, display chip nameMiodrag Milanovic2018-06-103-1/+32
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* Improving 5k supportDavid Shah2018-06-104-22/+59
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Fix iCE40 routing graphClifford Wolf2018-06-102-28/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add support for iCE40 global buffers (currently only for 1k devices)Clifford Wolf2018-06-108-124/+198
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Debugging on icebreakerDavid Shah2018-06-104-11/+217
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* Add blinky post-synthesis testbenchClifford Wolf2018-06-103-5/+26
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix ice40 pip/switch locked performance issueClifford Wolf2018-06-103-16/+9
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* ice40: Set config bits for unused IODavid Shah2018-06-101-1/+19
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Fix techmapDavid Shah2018-06-101-1/+1
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Add IO config to bitstreamDavid Shah2018-06-103-17/+93
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Write logic cell config to bitstreamDavid Shah2018-06-103-7/+60
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Lock out mutually exclusive pipsDavid Shah2018-06-102-2/+13
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Start adding routing to asc outputDavid Shah2018-06-101-0/+34
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Writing an empty ASC fileDavid Shah2018-06-105-1/+138
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Adding non-routing config bits to databaseDavid Shah2018-06-102-10/+63
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Add switch data to databaseDavid Shah2018-06-102-6/+95
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Renamed LOC attribute to BEL, fix ice40 IO bel namesClifford Wolf2018-06-092-9/+9
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Adding basic placement constraintsDavid Shah2018-06-091-3/+77
| | | | | | | Specify the attribute (* LOC="bel_name" *) on any cell to constrain its placement to that bel. Signed-off-by: David Shah <davey1576@gmail.com>
* Getting rid of .nil() methods, compare with zero- and default-constructed ↵Clifford Wolf2018-06-094-48/+36
| | | | | | objects instead Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add very basic routerClifford Wolf2018-06-095-35/+150
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* python: Fixing builds as importable moduleDavid Shah2018-06-081-0/+5
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Reformat remaining filesDavid Shah2018-06-081-1/+0
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Applied clang-format to my own contributionsZipCPU2018-06-072-10/+14
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* Set the default log to stdoutZipCPU2018-06-072-2/+17
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| * Moved placer definitions to place.h, main automatically runs placer nowZipCPU2018-06-071-3/+2
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| * Initial (random) placer capabilityZipCPU2018-06-071-1/+12
| | | | | | | | | | | | | | | | | | | | This commit also includes changes to jsonparse to allow it to 1) recognize ports with no connection, and set their net pointers to NULL 2) recognize designs with a ports node rather than a ports_direction The rule checker has also been modified to accommodate possible NULL netlists The ice40 chip now also has iterator operations ++bi and bi++.
| * Preliminary placer changes to mainZipCPU2018-06-071-0/+7
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* | ice40: More Python bindings and examplesDavid Shah2018-06-072-1/+17
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Refactor PortPin and add Python bindingDavid Shah2018-06-075-318/+126
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | Connected the log file facility to stderrZipCPU2018-06-071-0/+3
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