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* Add output wiresMiodrag Milanovic2019-10-201-0/+35
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* fix mux displayMiodrag Milanovic2019-10-201-2/+2
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* set wire active flagMiodrag Milanovic2019-10-202-1/+3
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* clk and lsr muxesMiodrag Milanovic2019-10-202-1/+93
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* draw rest of slice wires and more from switchboxMiodrag Milanovic2019-10-202-7/+106
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* OptimizeMiodrag Milanovic2019-10-202-18/+87
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* Add other side of slice wiresMiodrag Milanovic2019-10-202-14/+118
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* Display rest of slice input wiresMiodrag Milanovic2019-10-202-3/+69
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* Start adding visible wiresMiodrag Milanovic2019-10-205-10/+99
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* Added type to wireMiodrag Milanovic2019-10-203-1/+87
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* Draw swbox, smaller slices, proper ioMiodrag Milanovic2019-10-204-28/+157
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* ecp5: Add support for ECLKBRIDGECSDavid Shah2019-10-111-1/+52
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Fix tristate IO registersDavid Shah2019-10-091-3/+9
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add support for IO registersDavid Shah2019-10-092-0/+103
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add IDDR71B supportDavid Shah2019-10-092-3/+16
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add ODDR71B supportDavid Shah2019-10-091-3/+14
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Preparations for new IO belsDavid Shah2019-10-093-1/+16
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Fix parametersDavid Shah2019-10-041-0/+4
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Adding support for 36-bit wide PDP RAMsDavid Shah2019-10-014-19/+96
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Merge pull request #332 from YosysHQ/dave/python-refactorDavid Shah2019-09-191-96/+2
|\ | | | | Improving Python API and adding docs for it
| * python: Refactor out bindings shared between ECP5 and iCE40David Shah2019-09-151-96/+2
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Merge branch 'precompiled-bba' of https://github.com/xobs/nextpnr into ↵David Shah2019-09-191-18/+31
|\ \ | | | | | | | | | xobs-precompiled-bba
| * | ecp5: add support for PREGENERATED_BBA_PATHSean Cross2019-09-171-18/+31
| |/ | | | | | | | | | | | | Support pre-generated bba files to speed up compiling on Windows and get it compiling on Darwin. Signed-off-by: Sean Cross <sean@xobs.io>
* | Merge pull request #330 from zeldin/bbaDavid Shah2019-09-191-5/+6
|\ \ | |/ |/| bba: Default to native endian in bbasm
| * CMake: Generate chipdbs in build tree when building out-of-treeMarcus Comstedt2019-09-151-3/+4
| | | | | | | | Signed-off-by: Marcus Comstedt <marcus@mc.pp.se>
| * bba: Require explicit endianness flag, and supply itMarcus Comstedt2019-09-151-2/+2
| | | | | | | | Signed-off-by: Marcus Comstedt <marcus@mc.pp.se>
* | python: Fix getWireBelPinsDavid Shah2019-09-152-0/+20
|/ | | | | | Fixes #327 Signed-off-by: David Shah <dave@ds0.me>
* Merge pull request #329 from YosysHQ/dave/net_aliasesDavid Shah2019-09-131-0/+5
|\ | | | | json: Add support for net aliases
| * json: Add support for net aliasesDavid Shah2019-09-131-0/+5
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: Move clock constraints across IO and DCCADavid Shah2019-09-131-0/+9
|/ | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: use $PYTHON_EXECUTABLE for python pathSean Cross2019-09-091-2/+2
| | | | | | | | Sometimes the python executable might have a different name. Cmake sets the $PYTHON_EXECUTABLE variable to point to the binary path, so use this variable. Signed-off-by: Sean Cross <sean@xobs.io>
* ecp5: Add support for clock gating with DCCADavid Shah2019-08-312-39/+87
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add full part name to bitstream headerDavid Shah2019-08-273-0/+23
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add GSR/SGSR supportDavid Shah2019-08-274-3/+22
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Rename clock restriction attribute to "noglobal"Arnaud Durand2019-08-241-2/+2
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* Restrict clock promotion to globalArnaud Durand2019-08-221-0/+3
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* Merge pull request #309 from YosysHQ/dsptimingDavid Shah2019-08-092-2/+25
|\ | | | | ecp5: Conservative analysis of comb DSP timing
| * ecp5: Conservative analysis of comb DSP timingDavid Shah2019-07-082-2/+25
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Add deprecation warning for default packagesDavid Shah2019-08-081-1/+4
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: Fix handling of missing ports in LUT permutationDavid Shah2019-08-081-0/+4
| | | | | | | | | | | | Fixes #310 Signed-off-by: David Shah <dave@ds0.me>
* | clangfromatDavid Shah2019-08-071-2/+5
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: Add --out-of-context for building hard macrosDavid Shah2019-08-077-12/+36
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: Add a check for legacy parameter valuesDavid Shah2019-08-061-0/+12
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: New Property interfaceDavid Shah2019-08-058-444/+549
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Major Property improvements for common and iCE40David Shah2019-08-051-6/+6
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: Fix missing LUT inputs, fixes #301David Shah2019-07-101-0/+4
|/ | | | Signed-off-by: David Shah <dave@ds0.me>
* Merge pull request #284 from YosysHQ/json_writeDavid Shah2019-07-036-85/+119
|\ | | | | Initial support for writing to json files from nextpnr.
| * clangformat runMiodrag Milanovic2019-06-251-16/+20
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| * Merge masterMiodrag Milanovic2019-06-253-11/+18
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| * | default for 5G is speed 8Miodrag Milanovic2019-06-211-1/+5
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