aboutsummaryrefslogtreecommitdiffstats
path: root/ecp5/bitstream.cc
Commit message (Expand)AuthorAgeFilesLines
...
* | ecp5: Adding ancillary DCU belsDavid Shah2018-11-151-0/+17
* | ecp5: remove debug and clangformatDavid Shah2018-11-151-4/+5
* | dcu: Fix bitstream param handlingDavid Shah2018-11-151-0/+1
* | ecp5: Working on DCUDavid Shah2018-11-151-5/+39
* | ecp5: DCU bitstream gen handlingDavid Shah2018-11-151-0/+45
* | ecp5: Groundwork for DCU supportDavid Shah2018-11-151-13/+10
* | ecp5: Fix 85k PLL_LRDavid Shah2018-11-111-1/+2
|/
* ecp5: Allow setting IO SLEWRATEDavid Shah2018-11-011-0/+2
* ecp5: Add PLL supportDavid Shah2018-10-311-4/+133
* ecp5: DSP fixesDavid Shah2018-10-221-32/+39
* ecp5: Working on DSPsDavid Shah2018-10-221-82/+148
* ecp5: Adding DSP supportDavid Shah2018-10-211-0/+179
* clangformatDavid Shah2018-10-161-3/+5
* ecp5: Add support for correct tile naming in all variantsDavid Shah2018-10-161-1/+33
* ecp5: Fix BRAM tile namesDavid Shah2018-10-111-1/+1
* ecp5: Fixing BRAM initialisationDavid Shah2018-10-101-4/+14
* ecp5: Working on BRAM initialisationDavid Shah2018-10-091-0/+57
* ecp5: BRAM improvements with constant/inverted inputsDavid Shah2018-10-061-14/+63
* ecp5: Fixing EBR constant tie-offsDavid Shah2018-10-051-1/+2
* ecp5: Bitstream gen for DP16KD BRAMDavid Shah2018-10-051-0/+98
* ecp5: Infrastructure for BRAM bitstream genDavid Shah2018-10-051-0/+25
* ecp5: Negative clock support, general slice improvementsDavid Shah2018-10-021-2/+23
* clangformatDavid Shah2018-10-011-3/+1
* ecp5: Debugging DRAM packingDavid Shah2018-10-011-0/+9
* ecp5: Improve mixed no-FF/FF placementDavid Shah2018-09-301-11/+16
* ecp5: Relative placement and bitstream gen for carriesDavid Shah2018-09-301-1/+16
* ecp5: Global router produces a working bitstreamDavid Shah2018-09-291-0/+2
* API change: Use CellInfo* and NetInfo* as cell/net handles (ECP5)David Shah2018-08-051-3/+3
* ecp5: Remove libtrellis link for bitstream genDavid Shah2018-08-011-54/+44
* ecp5: Tweak bitstream chip scopeDavid Shah2018-08-011-1/+1
* Fix name clash for ecp5Miodrag Milanovic2018-07-261-1/+1
* clangformatDavid Shah2018-07-251-2/+2
* ecp5: Bitsream gen tuningDavid Shah2018-07-241-11/+16
* ecp5: Working on LVDS inputs for Versa supportDavid Shah2018-07-241-0/+8
* ecp5: Support for differential IODavid Shah2018-07-241-1/+15
* ecp5: Set BANKREF to correct VccIODavid Shah2018-07-241-2/+25
* ecp5: Fixing packer bugsDavid Shah2018-07-171-0/+12
* Revert "Move read methods to ReadMethods, remove some legacy access to Arch"Sergiusz Bazanski2018-07-141-3/+2
* Move read methods to ReadMethods, remove some legacy access to ArchSergiusz Bazanski2018-07-141-2/+3
* ecp5: Update arch to use new graphics APIDavid Shah2018-07-111-4/+6
* ecp5: New libtrellis tile lookup APIDavid Shah2018-07-111-19/+18
* ecp5: *** Blinky working ***David Shah2018-07-111-0/+3
* ecp5: Bitstream progressDavid Shah2018-07-111-1/+1
* ecp5: Working on bitstream genDavid Shah2018-07-111-1/+105
* ecp5: Adding bitstream gen for slice configDavid Shah2018-07-111-0/+14
* ecp5: Adding bitstream gen for pips and LUT initDavid Shah2018-07-111-0/+135
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-25 06:34:28 +0000