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* Fix chain swapMaciej Dudek2021-09-231-2/+15
| | | | | | | | | | | | Issue was due to dest_bels being not cleared between clusters unbindes, causing newly bind bels to be unbinded and having their old bel value changed to new bel value. Then when swap failed 2 cells were being bind to a single bel. I tested leaving dest_bels in the function scope and moving it to the loop scope. Code with dest_bels in the loop scope was faster than leaving it in the function scope, and checking if the cell is in the processed cluster. Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
* Merge pull request #823 from YosysHQ/gatecat/nexus-r1-tweaksgatecat2021-09-222-2/+4
|\ | | | | nexus: Tweaks for router1 performance
| * nexus: Tweaks for router1 performancegatecat2021-09-222-2/+4
| | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge pull request #821 from YosysHQ/gatecat/dsp-fixgatecat2021-09-225-36/+80
|\ \ | |/ |/| nexus: Fix DSP macro placement
| * placer1: Remove redundant relative constraint checkgatecat2021-09-221-4/+0
| | | | | | | | | | | | Macros with potentially inconsistent spacing are now permissible. Signed-off-by: gatecat <gatecat@ds0.me>
| * nexus: Fix DSP macro placementgatecat2021-09-224-32/+80
|/ | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #815 from antmicro/nexus-fix-siologic-handlinggatecat2021-09-202-2/+234
|\ | | | | nexus: Fixed an improved SIOLOGIC handling
| * Added support for syn_useioff for enabling tri-state control FF integration ↵Maciej Kurc2021-09-201-13/+23
| | | | | | | | | | | | into IOLOGIC. Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
| * Use correct names for IDDRX1_ODDRX1 FASM featuresMaciej Kurc2021-09-172-22/+4
| | | | | | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
| * Added automatic inference and integration of FFs driving T pin into IOLOGICMaciej Kurc2021-09-172-16/+177
| | | | | | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
| * Added handling of the case when tri-state control net bypasses SIOLOGIC belMaciej Kurc2021-09-171-2/+81
| | | | | | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
* | placer1: Fix cluster swap cost updatesgatecat2021-09-181-8/+4
| | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | timing: Always use max delay for required timegatecat2021-09-181-3/+5
| | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | timing: Fix slack for unconstrained clocksgatecat2021-09-181-6/+7
| | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge pull request #817 from YosysHQ/gatecat/chain-swapgatecat2021-09-181-47/+105
|\ \ | |/ |/| placer1: Allow swapping chains with other chains
| * placer1: Allow swapping chains with other chainsgatecat2021-09-171-47/+105
|/ | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #813 from YosysHQ/gatecat/py-on-failgatecat2021-09-172-1/+16
|\ | | | | command: Allow running Python on failure for state introspection
| * command: Allow running Python on failure for state introspectiongatecat2021-09-162-1/+16
|/ | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #806 from yrabbit/extend-placementgatecat2021-09-083-16/+74
|\ | | | | gowin: Add constraints on primitive placement.
| * Merge branch 'master' into extend-placementYRabbit2021-09-081-5/+18
| |\
| * \ Merge branch 'master' into extend-placementYRabbit2021-09-073-4/+12
| |\ \
| * \ \ Merge branch 'combine-dff' into extend-placementYRabbit2021-09-041-2/+26
| |\ \ \
| | * \ \ Merge branch 'master' into combine-dffYRabbit2021-09-024-11/+24
| | |\ \ \
| | * | | | gowin: Place DFFs of different types in the slice.YRabbit2021-08-311-2/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow the registers of the same type or pairs shown below to be placed in the same slide: |--------|--------| | DFFS | DFFR | | DFFSE | DFFRE | | DFFP | DFFC | | DFFPE | DFFCE | | DFFNS | DFFNR | | DFFNSE | DFFNRE | | DFFNP | DFFNC | | DFFNPE | DFFNCE | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
| * | | | | Merge branch 'master' into extend-placementYRabbit2021-09-044-11/+24
| |\ \ \ \ \ | | |/ / / / | |/| / / / | | |/ / /
| * | | | gowin: Add constraints on primitive placement.YRabbit2021-08-313-14/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added support for the INS_LOC instruction in the constraints file (.CST), which is used to specify object placement. Expanded treatment of IO_LOC/IO_PORT constraints, which now can be applied to both ports and IO buffers. Port constraints have priority. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* | | | | Merge pull request #808 from acomodi/fix-xdcgatecat2021-09-081-0/+2
|\ \ \ \ \ | |_|_|_|/ |/| | | | interchange: xdc: add more not_implemented commands
| * | | | interchange: xdc: add more not_implemented commandsAlessandro Comodi2021-09-081-0/+2
|/ / / / | | | | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
* | | | Merge pull request #807 from acomodi/fix-xdcgatecat2021-09-071-5/+18
|\ \ \ \ | |_|_|/ |/| | | interchange: xdc: add common not_implemented function
| * | | interchange: xdc: add common not_implemented functionAlessandro Comodi2021-09-071-5/+18
|/ / / | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
* | | clangformatgatecat2021-09-061-2/+4
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | | router2: Fix uninitialised valuesgatecat2021-09-061-1/+1
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | | nexus: Fix getBelGlobalBufgatecat2021-09-021-1/+5
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | | router2: Fix explored countgatecat2021-09-021-0/+2
| |/ |/| | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge pull request #790 from acomodi/place-only-same-cluster-in-sitegatecat2021-08-314-11/+24
|\ \ | |/ |/| interchange: place only cells belonging to the same clusters in the same site
| * interchange: clusters: fix other cluster allowance checks in same siteAlessandro Comodi2021-08-311-7/+2
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * interchange: entirely disable cache when binding site routingAlessandro Comodi2021-08-311-6/+6
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * gh: interchange: bump python-interchange tagAlessandro Comodi2021-08-311-1/+1
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * interchange: disallow placing cells on sites with clustersAlessandro Comodi2021-08-272-4/+22
|/ | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
* clangformatgatecat2021-08-261-3/+3
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #805 from YosysHQ/gatecat/py-portref-byvaluegatecat2021-08-261-10/+10
|\ | | | | python: Wrap PortRef by value
| * python: Wrap PortRef by valuegatecat2021-08-261-10/+10
|/ | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #710 from Ravenslofty/mistral-mlab-as-labgatecat2021-08-244-50/+85
|\ | | | | mistral: Use MLABs as if they're LABs (for now)
| * mistral: Permute MLAB init bits correctlygatecat2021-08-241-0/+22
| |
| * mistral: Use MLABs as if they're LABs (for now)Lofty2021-08-174-50/+63
| | | | | | | | Signed-off-by: Lofty <dan.ravensloft@gmail.com>
* | clangformatgatecat2021-08-241-5/+5
| | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge pull request #801 from yrabbit/TRBL-stylegatecat2021-08-231-5/+37
|\ \ | | | | | | gowin: Add the IO[TRBL]style placement recognition
| * | gowin: Add the IO[TRBL]style placement recognitionYRabbit2021-08-231-5/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | Specifying pin placement with this notation (e.g. IOR4B) allows to use the same constraint file without changes for different packages and even different families. The vendor router also understands this notation. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* | | Merge pull request #802 from YosysHQ/gatecat/python-rt-dlygatecat2021-08-232-0/+13
|\ \ \ | |/ / |/| | python: Allow querying route delays
| * | python: Allow querying route delaysgatecat2021-08-232-0/+13
|/ / | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
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