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| | * | Add initial handling of local site inverters and constant signals. | Keith Rothman | 2021-03-25 | 8 | -60/+460 |
| | * | [FPGA interchange] Small fix to get_net_type. | Keith Rothman | 2021-03-25 | 2 | -9/+14 |
| | * | Enable counter tests and add RAM tests. | Keith Rothman | 2021-03-25 | 6 | -2/+284 |
| * | | Merge pull request #649 from acomodi/add-archcheck-to-all-tests | gatecat | 2021-03-26 | 3 | -9/+41 |
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| | * | | gh-actions: better yosys caching based on version | Alessandro Comodi | 2021-03-26 | 2 | -6/+35 |
| | * | | interchange: add archcheck tests to all-device-test target | Alessandro Comodi | 2021-03-26 | 2 | -3/+6 |
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| * | | Merge pull request #650 from YosysHQ/gatecat/nexus-17k-fixes | gatecat | 2021-03-26 | 1 | -1/+4 |
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| | * | nexus: Fix FASM gen for LIFCL-17 | gatecat | 2021-03-26 | 1 | -1/+4 |
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| * | Merge pull request #648 from YosysHQ/gatecat/nexus-get_pins | gatecat | 2021-03-25 | 1 | -7/+56 |
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| | * | nexus: Add support for get_pins PDC command | gatecat | 2021-03-25 | 1 | -7/+56 |
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| * | Merge pull request #628 from acomodi/add-interchange-devices | gatecat | 2021-03-25 | 22 | -168/+450 |
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| | * | gh-actions: use ccache and build tools before running tests | Alessandro Comodi | 2021-03-25 | 2 | -40/+105 |
| | * | gh-actions: interchange: multiple jobs, one for each device | Alessandro Comodi | 2021-03-24 | 4 | -8/+17 |
| | * | interchange: examples: remove unused makefiles | Alessandro Comodi | 2021-03-24 | 2 | -99/+0 |
| | * | interchange: devices: bel_bucket_seeds -> device_config | Alessandro Comodi | 2021-03-23 | 3 | -3/+3 |
| | * | interchange: added boards and group testing across multiple boards | Alessandro Comodi | 2021-03-23 | 10 | -45/+155 |
| | * | gh-actions: remove multi-process arch generation | Alessandro Comodi | 2021-03-23 | 1 | -1/+1 |
| | * | fpga_interchange: add test data for new architectures | Alessandro Comodi | 2021-03-23 | 3 | -0/+108 |
| | * | fpga_interchange: use higher java heap space | Alessandro Comodi | 2021-03-23 | 3 | -3/+4 |
| | * | fpga_interchange: add more devices | Alessandro Comodi | 2021-03-23 | 8 | -3/+91 |
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| * | Merge pull request #644 from litghost/add_global_buffers | gatecat | 2021-03-23 | 5 | -11/+30 |
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| | * | [FPGA interchange] Add support for global buffers from chipdb. | Keith Rothman | 2021-03-23 | 5 | -11/+30 |
| * | | Merge pull request #643 from litghost/id_constants | gatecat | 2021-03-23 | 2 | -4/+27 |
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| | * | | [FPGA interchange] Convert some string constants to IdString. | Keith Rothman | 2021-03-23 | 2 | -4/+27 |
| * | | | Merge pull request #640 from litghost/inversion_logic | gatecat | 2021-03-23 | 7 | -8/+131 |
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| | * | | Initial version of inverter logic. | Keith Rothman | 2021-03-23 | 7 | -8/+131 |
| * | | | Merge pull request #639 from litghost/parameter_iteration | gatecat | 2021-03-23 | 8 | -44/+446 |
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| | * | Update FPGA interchange chipdb to v4 with inverter data. | Keith Rothman | 2021-03-23 | 1 | -1/+22 |
| | * | Use new parameter definition data in FPGA interchange processing. | Keith Rothman | 2021-03-23 | 7 | -43/+415 |
| | * | Update latest version of FPGA interchange schema. | Keith Rothman | 2021-03-23 | 1 | -1/+10 |
| * | | Merge pull request #642 from YosysHQ/gatecat/missing-cell-pin | gatecat | 2021-03-23 | 1 | -0/+3 |
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| | * | interchange: Add nice error for missing cell pins | gatecat | 2021-03-23 | 1 | -0/+3 |
| * | | Merge pull request #641 from litghost/initial_lookahead | gatecat | 2021-03-23 | 15 | -13/+2689 |
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| | * | Initial lookahead for FPGA interchange. | Keith Rothman | 2021-03-23 | 15 | -13/+2689 |
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| * | Merge pull request #638 from litghost/fixup_physical_netlist_writer | gatecat | 2021-03-22 | 1 | -11/+93 |
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| | * | Correct some bugs in writing of physical netlist w.r.t. site sources. | Keith Rothman | 2021-03-22 | 1 | -11/+93 |
| * | | Merge pull request #637 from litghost/refine_site_router | gatecat | 2021-03-22 | 17 | -588/+2745 |
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| | * | | Rework FPGA interchange site router. | Keith Rothman | 2021-03-22 | 12 | -571/+2617 |
| | * | | Add missing dependencies to CMake targets. | Keith Rothman | 2021-03-22 | 5 | -17/+128 |
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| * | | Merge pull request #634 from litghost/add_get_bel_pin_type | gatecat | 2021-03-22 | 3 | -0/+10 |
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| | * | | Add getBelPinType to Python interface. | Keith Rothman | 2021-03-22 | 3 | -0/+10 |
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| * | | Merge pull request #632 from litghost/add_check_pip_for_net | gatecat | 2021-03-22 | 8 | -16/+30 |
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| | * | Add "checkPipAvailForNet" to Arch API. | Keith Rothman | 2021-03-22 | 8 | -16/+30 |
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| * | Merge pull request #636 from litghost/add_pseudo_pip_data | gatecat | 2021-03-22 | 4 | -7/+144 |
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| | * | Increment required python-fpga-interchange version. | Keith Rothman | 2021-03-22 | 1 | -1/+1 |
| | * | Add pseudo pip data to chipdb (with schema bump). | Keith Rothman | 2021-03-22 | 3 | -6/+143 |
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| * | Merge pull request #635 from litghost/refactor_headers | gatecat | 2021-03-22 | 10 | -891/+1292 |
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| | * | Update tests to include Tcl header order fix. | Keith Rothman | 2021-03-19 | 1 | -0/+0 |
| | * | Refactor header structures in FPGA interchange Arch. | Keith Rothman | 2021-03-19 | 9 | -891/+1292 |
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| * | Merge pull request #633 from YosysHQ/gatecat/optional-ipo | gatecat | 2021-03-19 | 1 | -3/+4 |
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