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| * | clangformat.William D. Jones2021-12-162-9/+12
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| * | README.md: Add machxo2 arch to list of (experimental) supported devices.William D. Jones2021-12-161-0/+1
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| * | machxo2: Remove no-iobs option. It was always enabled and should remain an ↵William D. Jones2021-12-166-8/+5
| | | | | | | | | | | | implementation detail.
| * | machxo2: Remove -noiopad option when generating miters for post-pnr ↵William D. Jones2021-12-161-1/+2
| | | | | | | | | | | | verification.
| * | machxo2: Add packing logic to forbid designs lacking FACADE_IO top-level ports.William D. Jones2021-12-161-0/+46
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| * | machxo2: Correct which PIO wires get adjusted when writing text bitstream. ↵William D. Jones2021-12-161-9/+26
|/ / | | | | | | Add verbose logging for adjustments.
* | Merge pull request #874 from yrabbit/modelsgatecat2021-12-151-1/+1
|\ \ | | | | | | gowin: Recognize models correctly
| * | gowin: Recognize models correctlyYRabbit2021-12-151-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | For example, clearly distinguish between GW1N-4 GW1NR-4 GW1NS-4 GW1NSR-4 GW1NSR-4 Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* | Merge pull request #872 from YosysHQ/gatecat/py-loc-apigatecat2021-12-142-1/+8
|\ \ | |/ |/| python: Bind getBelLocation/getPipLocation
| * python: Bind getBelLocation/getPipLocationgatecat2021-12-142-1/+8
|/ | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #870 from YosysHQ/gatecat/ecp5-lutpermgatecat2021-12-148-8/+118
|\ | | | | ecp5: LUT permutation support
| * ecp5: LUT permutation supportgatecat2021-12-138-8/+118
| | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge pull request #871 from yrabbit/englishgatecat2021-12-141-4/+4
|\ \ | |/ |/| gowin: Fix spelling of messages
| * gowin: Fix spelling of messagesYRabbit2021-12-141-4/+4
|/ | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Merge pull request #868 from mkj/mkj/chipdb-16bitgatecat2021-12-132-14/+15
|\ | | | | ecp5: Reduce some chipdb fields from 32 to 16 bit
| * ecp5: Reduce some chipdb fields sizesMatt Johnston2021-12-132-14/+15
|/ | | | This reduces the final binary size by ~7 MB for 85k
* clangformatgatecat2021-12-122-7/+9
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* router2: Improve reservation debug logginggatecat2021-12-121-2/+4
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #867 from mkj/mkj/routerspeed2gatecat2021-12-124-16/+107
|\ | | | | Improvements to ecp5 router speed
| * ecp5: Keep "visited" localMatt Johnston2021-12-121-2/+1
| | | | | | | | Otherwise it keeps growing boundless and slows down small arcs
| * ecp5: Use a vector rather than dictMatt Johnston2021-12-123-14/+106
| | | | | | | | | | This improves router1 performance vs the default dict Using it for wire2net, pip2net, wire_fanout
* | Merge pull request #869 from YosysHQ/gatecat/mistral-route-fixgatecat2021-12-122-3/+3
|\ \ | | | | | | mistral: DATAIN and DATAOUT of GPIO have swapped
| * | mistral: Bump CI versiongatecat2021-12-121-1/+1
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | mistral: DATAIN and DATAOUT of GPIO have swappedgatecat2021-12-121-2/+2
|/ / | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge branch 'master' of github.com:YosysHQ/nextpnrgatecat2021-12-121-0/+3
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| * \ Merge pull request #865 from yrabbit/ALU-head-at-zerogatecat2021-12-121-0/+3
| |\ \ | | | | | | | | gowin: BUGFIX. Place the ALU head in sliсe 0 only
| | * \ Merge branch 'YosysHQ:master' into ALU-head-at-zeroYRabbit2021-12-123-3/+3
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| | * | | gowin: BUGFIX. Place the ALU head in sliсe 0 onlyYRabbit2021-12-111-0/+3
| | | |/ | | |/| | | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* | / | clangformatgatecat2021-12-122-16/+13
|/ / / | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | / router2: Error instead of hang in case of reservation conflictsgatecat2021-12-121-0/+3
| |/ |/| | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge pull request #866 from YosysHQ/gatecat/mistral-include-toolsgatecat2021-12-113-3/+3
|\ \ | |/ |/| mistral: Add 'tools' dir to include path
| * mistral: Add 'tools' dir to include pathgatecat2021-12-113-3/+3
|/ | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #863 from antmicro/pack_lutffgatecat2021-11-242-0/+182
|\ | | | | nexus: LUT and FF clustering
| * Added checking if all FFs added to an existing cluster have matching ↵Maciej Kurc2021-11-231-0/+44
| | | | | | | | | | | | configuration Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
| * Fixed potential issues with carry-chain cluster expansion, added a parameter ↵Maciej Kurc2021-11-222-14/+23
| | | | | | | | | | | | controlling the ratio of FFs that got glued to carry-chain clusters. Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
| * Added appending FFs to other existing LUT cluster types (carry, widefn)Maciej Kurc2021-11-221-18/+67
| | | | | | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
| * Added an option to control LUT and FF packingMaciej Kurc2021-11-222-1/+8
| | | | | | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
| * Added clustering free LUTs and FFsMaciej Kurc2021-11-221-0/+73
|/ | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
* Merge pull request #862 from DX-MON/mastergatecat2021-11-191-6/+4
|\ | | | | common: Improved the random seed initialisation for the context
| * common: Improved the random seed initialisation for the contextdx-mon2021-11-191-6/+4
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* Merge pull request #859 from yrabbit/gowin-packagesgatecat2021-11-074-17/+53
|\ | | | | gowin: Add partnumbers and packages to the chipdb
| * gowin: Check the chipdb versionYRabbit2021-11-072-1/+7
| | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
| * gowin: use latest Apycula releaseYRabbit2021-11-071-1/+1
| | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
| * Merge branch 'master' into gowin-packagesYRabbit2021-11-062-3/+11
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* | Merge pull request #857 from YosysHQ/gatecat/ecp5-ff-iodelgatecat2021-11-052-3/+11
|\ \ | | | | | | ecp5: Fix packing of IOFF with IODELAYs
| * | ecp5: Fix packing of IOFF with IODELAYsgatecat2021-11-052-3/+11
|/ / | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * gowin: Use speed from chip base.YRabbit2021-11-053-20/+27
| | | | | | | | | | | | | | Another simplification of the input regular expression, now the speed is taken from the base. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
| * gowin: Add partnumbers and packages to the chipdbYRabbit2021-11-043-6/+29
|/ | | | | | | | | | Instead of parsing the partnumber with a regular expression, a simple table is used. This is done because the structure of the partnumber changes as new features appear (e.g., ES instead of C6/I5) This commit does not yet disable the very first regular expression check. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Merge pull request #855 from galibert/mastergatecat2021-10-282-4/+3
|\ | | | | mistral: Sync with yet another reorganization
| * mistral: Sync with yet another reorganizationOlivier Galibert2021-10-282-4/+3
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