iCE40/nextpnr - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Merge pull request #775 from YosysHQ/gatecat/fix-io-checks	gatecat	2021-07-26	1	-6/+16
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\| *	interchange: Check IO validity after all are placed	gatecat	2021-07-23	1	-6/+16
* \|	Merge pull request #777 from YosysHQ/gatecat/gui-fixes	gatecat	2021-07-25	5	-5/+20
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\| *	gui: Fix some typos	gatecat	2021-07-25	2	-5/+5
\| *	gui: Implement about dialog	gatecat	2021-07-25	4	-0/+15
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*	Merge pull request #757 from antmicro/lut-mapping-cache	gatecat	2021-07-22	8	-74/+510
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\| *	Added an option to disable the LUT mapping cache	Maciej Kurc	2021-07-22	5	-8/+16
\| *	Added more code comments, formatted the code	Maciej Kurc	2021-07-22	6	-123/+124
\| *	Added computing and reporting LUT mapping cache size	Maciej Kurc	2021-07-16	2	-0/+37
\| *	Fixed assertion typos	Maciej Kurc	2021-07-16	1	-2/+2
\| *	Migrated C arrays to std::array containers.	Maciej Kurc	2021-07-16	2	-9/+31
\| *	LUT mapping ceche optimizations 2	Maciej Kurc	2021-07-16	3	-93/+17
\| *	LUT mapping cache optimizations 1	Maciej Kurc	2021-07-16	2	-32/+48
\| *	Working site LUT mapping cache	Maciej Kurc	2021-07-16	7	-42/+470
* \|	Merge pull request #772 from antmicro/xdc_parse	gatecat	2021-07-21	1	-0/+7
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\| * \|	Add dummy function to parse creat_clock in XDC files	Maciej Dudek	2021-07-21	1	-0/+7
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* \|	Merge pull request #768 from YosysHQ/gatecat/fix-gui-error	gatecat	2021-07-21	2	-11/+62
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\| * \|	gui: Improve Fatal Error message	gatecat	2021-07-20	2	-11/+62
* \| \|	clangformat	gatecat	2021-07-21	1	-1/+1
* \| \|	Merge pull request #770 from YosysHQ/gatecat/empty-idstringlist	gatecat	2021-07-20	1	-1/+1
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\| * \| \|	Fix definition of an empty IdStringList	gatecat	2021-07-20	1	-1/+1
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* \| \|	Merge pull request #771 from YosysHQ/gatecat/ice40-ip-no-busaddr74	gatecat	2021-07-20	1	-3/+4
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\| * \|	ice40: Use default value when IP is missing BUS_ADDR74 parameter	gatecat	2021-07-20	1	-3/+4
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* \|	Merge pull request #767 from YosysHQ/gatecat/ic-pref-const	gatecat	2021-07-20	1	-1/+10
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\| * \|	interchange: Fix preferred constant handling when canInvert	gatecat	2021-07-20	1	-1/+10
* \| \|	Merge pull request #766 from pepijndevos/python	gatecat	2021-07-17	2	-4/+2
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\| * \| \|	remove generic leftover in gowin	Pepijn de Vos	2021-07-17	1	-2/+2
\| * \| \|	remove generic leftover in gowin	Pepijn de Vos	2021-07-17	1	-2/+0
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* \| \|	Merge pull request #764 from acomodi/fix-pseudo-pips	gatecat	2021-07-15	1	-8/+18
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\| * \|	interchange: disallow pseudo-pip on same nets if tile has luts	Alessandro Comodi	2021-07-15	1	-8/+18
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* \|	Merge pull request #762 from antmicro/testarch_timing	gatecat	2021-07-14	2	-2/+2
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\| * \|	[interchange] Update chipdb and python-fpga-interchange versions	Maciej Dudek	2021-07-14	2	-2/+2
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* \|	Merge pull request #761 from acomodi/interchange-constrs	gatecat	2021-07-12	5	-13/+174
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\| * \|	interchange: xdc and place constr: address review comments	Alessandro Comodi	2021-07-12	3	-23/+13
\| * \|	interchange: xdc: add get_cells command	Alessandro Comodi	2021-07-12	1	-13/+70
\| * \|	interchange: add constraints constraints application routine	Alessandro Comodi	2021-07-12	4	-0/+114
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* \|	Merge pull request #760 from YosysHQ/gatecat/xcup-ibufds	gatecat	2021-07-12	2	-5/+16
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\| * \|	interchange: Skip IO ports in dedicated routing check	gatecat	2021-07-12	1	-0/+8
\| * \|	interchange: Debug IO port validity check failures	gatecat	2021-07-12	2	-3/+5
\| * \|	interchange: Place DIFFINBUF and IBUFCTRL for UltraScale+ IBUFDS	gatecat	2021-07-12	1	-3/+4
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* \|	Merge pull request #759 from pepijndevos/gw1ndb	gatecat	2021-07-11	1	-1/+8
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\| * \|	GW1NR is not a seperate family, but GW1NS is	Pepijn de Vos	2021-07-11	1	-1/+8
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* \|	Merge pull request #758 from YosysHQ/gatecat/hist-oob	gatecat	2021-07-11	1	-1/+6
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\| * \|	timing: Fix out-of-bounds histogram bins in all cases	gatecat	2021-07-10	1	-1/+6
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* \|	Merge branch 'master' of github.com:YosysHQ/nextpnr	gatecat	2021-07-10	6	-23/+93
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\| * \	Merge pull request #755 from yrabbit/io_port	gatecat	2021-07-08	1	-16/+24
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\| \| * \|	Fix the boolean.	YRabbit	2021-07-08	1	-1/+1
\| \| * \|	Fix formating	YRabbit	2021-07-07	1	-24/+24
\| \| * \|	Fix boolean value.	YRabbit	2021-07-07	1	-1/+1
\| \| * \|	Merge branch 'master' into io_port	YRabbit	2021-07-07	18	-78/+201
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