Commit message (Collapse) | Author | Age | Files | Lines | |
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* | update release that actually includes GW1NS-4 chipdb | Pepijn de Vos | 2021-12-26 | 1 | -1/+1 |
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* | build on release of apycula with gw1ns-4 support | Pepijn de Vos | 2021-12-24 | 1 | -1/+1 |
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* | Add support for GW1NS-4 series devices | Pepijn de Vos | 2021-12-24 | 1 | -1/+1 |
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* | Merge pull request #887 from YosysHQ/gatecat/mistral-bit-update | gatecat | 2021-12-22 | 2 | -2/+2 |
|\ | | | | | mistral: Update to latest enum name | ||||
| * | mistral: Update to latest enum name | gatecat | 2021-12-22 | 2 | -2/+2 |
|/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #885 from antmicro/nexus-slewrate | gatecat | 2021-12-21 | 3 | -2/+10 |
|\ | | | | | nexus: handle SLEWRATE in pdc | ||||
| * | nexus: handle SLEWRATE in pdc | Karol Gugala | 2021-12-20 | 3 | -2/+10 |
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* | Merge pull request #883 from YosysHQ/gatecat/new-predictdelay | gatecat | 2021-12-19 | 26 | -70/+89 |
|\ | | | | | archapi: Use arbitrary rather than actual placement in predictDelay [breaking change] | ||||
| * | archapi: Use arbitrary rather than actual placement in predictDelay | gatecat | 2021-12-19 | 26 | -70/+89 |
|/ | | | | | | | | | | | | This makes predictDelay be based on an arbitrary belpin pair rather than a arc of a net based on cell placement. This way 'what-if' decisions can be evaluated without actually changing placement; potentially useful for parallel placement. A new helper predictArcDelay behaves like the old predictDelay to minimise the impact on existing passes; only arches need be updated. Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #882 from YosysHQ/gatecat/router1-tmg-ripup | gatecat | 2021-12-18 | 3 | -6/+103 |
|\ | | | | | router1: Experimental timing-driven ripup support | ||||
| * | router1: Experimental timing-driven ripup support | gatecat | 2021-12-18 | 3 | -6/+103 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | | Merge pull request #881 from uis246/regex | gatecat | 2021-12-18 | 1 | -6/+2 |
|\ \ | | | | | | | Tidy gowin modification regex | ||||
| * | | Clean gowin modification regex | uis | 2021-12-18 | 1 | -6/+2 |
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* | | | Merge pull request #880 from YosysHQ/gatecat/router1-heuristic | gatecat | 2021-12-18 | 1 | -13/+25 |
|\ \ \ | |/ / |/| / | |/ | router1: Improve timing heuristic | ||||
| * | router1: Improve timing heuristic | gatecat | 2021-12-18 | 1 | -13/+25 |
|/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #879 from YosysHQ/gatecat/nexus-867 | gatecat | 2021-12-18 | 2 | -2/+73 |
|\ | | | | | nexus: router1 speedup based on #867 | ||||
| * | nexus: router1 speedup based on #867 | gatecat | 2021-12-17 | 2 | -2/+73 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | | Merge pull request #878 from YosysHQ/gatecat/fix-876 | gatecat | 2021-12-17 | 1 | -1/+1 |
|\ \ | |/ |/| | frontend: Consider net aliases when uniquifying name | ||||
| * | frontend: Consider net aliases when uniquifying name | gatecat | 2021-12-17 | 1 | -1/+1 |
|/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #858 from cr1901/machxo2 | gatecat | 2021-12-17 | 9 | -18/+83 |
|\ | | | | | MachXO2 Checkpoint 2 | ||||
| * | clangformat. | William D. Jones | 2021-12-16 | 2 | -9/+12 |
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| * | README.md: Add machxo2 arch to list of (experimental) supported devices. | William D. Jones | 2021-12-16 | 1 | -0/+1 |
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| * | machxo2: Remove no-iobs option. It was always enabled and should remain an ↵ | William D. Jones | 2021-12-16 | 6 | -8/+5 |
| | | | | | | | | implementation detail. | ||||
| * | machxo2: Remove -noiopad option when generating miters for post-pnr ↵ | William D. Jones | 2021-12-16 | 1 | -1/+2 |
| | | | | | | | | verification. | ||||
| * | machxo2: Add packing logic to forbid designs lacking FACADE_IO top-level ports. | William D. Jones | 2021-12-16 | 1 | -0/+46 |
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| * | machxo2: Correct which PIO wires get adjusted when writing text bitstream. ↵ | William D. Jones | 2021-12-16 | 1 | -9/+26 |
|/ | | | | Add verbose logging for adjustments. | ||||
* | Merge pull request #874 from yrabbit/models | gatecat | 2021-12-15 | 1 | -1/+1 |
|\ | | | | | gowin: Recognize models correctly | ||||
| * | gowin: Recognize models correctly | YRabbit | 2021-12-15 | 1 | -1/+1 |
|/ | | | | | | | | | | | For example, clearly distinguish between GW1N-4 GW1NR-4 GW1NS-4 GW1NSR-4 GW1NSR-4 Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | ||||
* | Merge pull request #872 from YosysHQ/gatecat/py-loc-api | gatecat | 2021-12-14 | 2 | -1/+8 |
|\ | | | | | python: Bind getBelLocation/getPipLocation | ||||
| * | python: Bind getBelLocation/getPipLocation | gatecat | 2021-12-14 | 2 | -1/+8 |
|/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #870 from YosysHQ/gatecat/ecp5-lutperm | gatecat | 2021-12-14 | 8 | -8/+118 |
|\ | | | | | ecp5: LUT permutation support | ||||
| * | ecp5: LUT permutation support | gatecat | 2021-12-13 | 8 | -8/+118 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | | Merge pull request #871 from yrabbit/english | gatecat | 2021-12-14 | 1 | -4/+4 |
|\ \ | |/ |/| | gowin: Fix spelling of messages | ||||
| * | gowin: Fix spelling of messages | YRabbit | 2021-12-14 | 1 | -4/+4 |
|/ | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | ||||
* | Merge pull request #868 from mkj/mkj/chipdb-16bit | gatecat | 2021-12-13 | 2 | -14/+15 |
|\ | | | | | ecp5: Reduce some chipdb fields from 32 to 16 bit | ||||
| * | ecp5: Reduce some chipdb fields sizes | Matt Johnston | 2021-12-13 | 2 | -14/+15 |
|/ | | | | This reduces the final binary size by ~7 MB for 85k | ||||
* | clangformat | gatecat | 2021-12-12 | 2 | -7/+9 |
| | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | router2: Improve reservation debug logging | gatecat | 2021-12-12 | 1 | -2/+4 |
| | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #867 from mkj/mkj/routerspeed2 | gatecat | 2021-12-12 | 4 | -16/+107 |
|\ | | | | | Improvements to ecp5 router speed | ||||
| * | ecp5: Keep "visited" local | Matt Johnston | 2021-12-12 | 1 | -2/+1 |
| | | | | | | | | Otherwise it keeps growing boundless and slows down small arcs | ||||
| * | ecp5: Use a vector rather than dict | Matt Johnston | 2021-12-12 | 3 | -14/+106 |
| | | | | | | | | | | This improves router1 performance vs the default dict Using it for wire2net, pip2net, wire_fanout | ||||
* | | Merge pull request #869 from YosysHQ/gatecat/mistral-route-fix | gatecat | 2021-12-12 | 2 | -3/+3 |
|\ \ | | | | | | | mistral: DATAIN and DATAOUT of GPIO have swapped | ||||
| * | | mistral: Bump CI version | gatecat | 2021-12-12 | 1 | -1/+1 |
| | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | | mistral: DATAIN and DATAOUT of GPIO have swapped | gatecat | 2021-12-12 | 1 | -2/+2 |
|/ / | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | | Merge branch 'master' of github.com:YosysHQ/nextpnr | gatecat | 2021-12-12 | 1 | -0/+3 |
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| * \ | Merge pull request #865 from yrabbit/ALU-head-at-zero | gatecat | 2021-12-12 | 1 | -0/+3 |
| |\ \ | | | | | | | | | gowin: BUGFIX. Place the ALU head in sliсe 0 only | ||||
| | * \ | Merge branch 'YosysHQ:master' into ALU-head-at-zero | YRabbit | 2021-12-12 | 3 | -3/+3 |
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| | * | | | gowin: BUGFIX. Place the ALU head in sliсe 0 only | YRabbit | 2021-12-11 | 1 | -0/+3 |
| | | |/ | | |/| | | | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | ||||
* | / | | clangformat | gatecat | 2021-12-12 | 2 | -16/+13 |
|/ / / | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | / | router2: Error instead of hang in case of reservation conflicts | gatecat | 2021-12-12 | 1 | -0/+3 |
| |/ |/| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> |