aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* nexus: Fix LRAM pin typesDavid Shah2020-12-072-10/+11
* nexus: Add support for initialised LRAMDavid Shah2020-12-074-12/+50
* nexus: Add basic LRAM support (no init)David Shah2020-12-026-4/+116
* nexus: Add PLL supportDavid Shah2020-12-024-3/+213
* nexus: Add support for deriving timing constraints in packerDavid Shah2020-12-021-0/+96
* nexus/pdc: Parse simple clock constraintsDavid Shah2020-12-021-0/+61
* Merge pull request #526 from YosysHQ/dave/router2-timingDavid Shah2020-12-011-2/+17
|\
| * router2: Avoid ripup of critical pathDavid Shah2020-12-011-2/+17
* | Merge pull request #525 from YosysHQ/dave/router2-tweaksDavid Shah2020-12-011-5/+46
|\|
| * router2: Make splitting of wires thread-safeDavid Shah2020-12-011-4/+39
| * router2: Add per-thread rngDavid Shah2020-12-011-1/+7
|/
* Merge pull request #524 from daveshah1/nextpnr-nexusMiodrag Milanović2020-11-3037-13/+7434
|\
| * nexus: Update docs and CMakeDavid Shah2020-11-304-3/+45
| * nexus: Fix db integrity checkDavid Shah2020-11-303-19/+8
| * nexus: Add to CIDavid Shah2020-11-303-2/+13
| * nexus: Add post-place LUTFF optimisationDavid Shah2020-11-304-19/+200
| * nexus: Improve error handling in global routerDavid Shah2020-11-301-0/+8
| * nexus: Preliminary integration of DSP timing dataDavid Shah2020-11-303-4/+111
| * nexus: Tweak heuristics to improve routeabilityDavid Shah2020-11-301-2/+2
| * nexus: Clocked MULTADDSUB36X36 fixDavid Shah2020-11-301-0/+2
| * nexus: Add MULTADDSUB36X36David Shah2020-11-301-4/+21
| * nexus: Add MULTADDSUB18X18 supportDavid Shah2020-11-302-17/+78
| * nexus: ACC54 definitionsDavid Shah2020-11-303-0/+77
| * nexus: Add DSP pre-adder supportDavid Shah2020-11-302-2/+23
| * nexus: Fix DSP signed portsDavid Shah2020-11-301-2/+2
| * nexus: Larger DSP tweaksDavid Shah2020-11-302-9/+15
| * nexus: Fix slow routing around DSPsDavid Shah2020-11-302-0/+28
| * nexus: Fix validity checking when DSPs are usedDavid Shah2020-11-302-3/+10
| * nexus: Refactor DSP macro splitting to make it more genericDavid Shah2020-11-305-29/+153
| * nexus: Add support for clocked MULT9X9sDavid Shah2020-11-304-0/+57
| * nexus: Support for unclocked 9x9 multipliesDavid Shah2020-11-305-19/+102
| * nexus: More DSP primitive configDavid Shah2020-11-303-1/+67
| * nexus: Miscellaneous DSP infrastructureDavid Shah2020-11-304-24/+135
| * nexus: Add some infrastructure for DSP packingDavid Shah2020-11-303-5/+163
| * nexus: Tweak delay heuristicsDavid Shah2020-11-301-2/+4
| * router1: Fix same-source-dest caseDavid Shah2020-11-301-0/+14
| * nexus: Add EBR timing analysisDavid Shah2020-11-302-0/+38
| * nexus: Add LUTRAM and WIDEFN9 timing supportDavid Shah2020-11-303-4/+33
| * timing: Add a few more cell typesDavid Shah2020-11-305-7/+97
| * nexus: Swap sort order to make some lookups easierDavid Shah2020-11-303-4/+4
| * nexus: Add cell delay lookupDavid Shah2020-11-304-0/+91
| * nexus: Lookup speed grade and pip delaysDavid Shah2020-11-302-1/+31
| * nexus: Add timing structures to BBADavid Shah2020-11-302-2/+50
| * nexus: Add error if device not specifiedDavid Shah2020-11-301-0/+3
| * nexus: Add missing Q_MOC_RUN guardDavid Shah2020-11-301-0/+3
| * nexus: Default EBR DWS pins to 1David Shah2020-11-302-1/+8
| * nexus: Use dedicated Vcc routing for OXIDE_COMB pinsDavid Shah2020-11-303-12/+18
| * nexus: Basic support for carriesDavid Shah2020-11-304-3/+103
| * nexus: Add WIDEFN9 supportDavid Shah2020-11-301-0/+47
| * nexus: Default to router2 for nowDavid Shah2020-11-301-1/+1
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 06:20:42 +0000